On 2022-10-05 20:56, Ramesh Errabolu wrote: > > Logan, > > You are right about AMD devices connecting to buses [0000:16] and [0000:64]. > However I am unable to understand as to how you extend that to mean they > belong to Intel 0x09A2. Well the root bus in your tree is 09A2 and each of the 16 and 64 buses each have a 09A2. So it's my guess that 09A2 is the root complex it just shows up multiple times. > Per my understanding I am expecting Root Complex enumerated as a device, > with various other devices hanging off one or more ports/buses. In the > PCIe device tree, I don't see that. > > I see the [domain::bus] as the root of the AMD device. Furthermore I see > Intel devices 0x09A2 hanging off the same domain::bus. I will take your > word, but the way the root complex is reported could be less confusing. Yup. Like I said, this is a bit strange. > If I could make a request, it will be very helpfulf for folks who don't > dabble in this area with a simple cheat sheet plus write explaining with > examples the various root complexes and the variou end-points hanging off > of them. I don't really know any more than you do here. You'd have to ask Intel what their newer topologies imply. They keep coming up with new ways to organize things and its not clear what it means from a P2P perspective. But really what needs to happen is to verify P2PDMA works between ports and find a way for the whitelist code to accept it if it does. Logan
