On Thu, Aug 18, 2022 at 03:51:31PM +0200, Marek Behún wrote: > From: Pali Rohár <pali@xxxxxxxxxx> > > The No Command Completed Support bit in the Slot Capabilities register > indicates whether Command Completed Interrupt Enable is unsupported. > > We already check whether No Command Completed Support bit is set in > pcie_wait_cmd(), and do not wait in this case. > > Let's not enable this Command Completed Interrupt at all if NCCS is set, > so that when users dump configuration space from userspace, the dump > does not confuse them by saying that Command Completed Interrupt is not > supported, but it is enabled. > > Signed-off-by: Pali Rohár <pali@xxxxxxxxxx> > Signed-off-by: Marek Behún <kabel@xxxxxxxxxx> Reviewed-by: Lukas Wunner <lukas@xxxxxxxxx> I note however that this change isn't really necessary because CCIE "must be hardwired to 0b" "If Command Completed notification is not supported" per PCIe r6.0 sec 7.5.3.10. It's purely a cosmetic issue. Thanks, Lukas
