> -----Original Message-----
> From: Philipp Zabel <p.zabel@xxxxxxxxxxxxxx>
> Sent: 2022年8月18日 16:51
> To: Hongxing Zhu <hongxing.zhu@xxxxxxx>; l.stach@xxxxxxxxxxxxxx;
> bhelgaas@xxxxxxxxxx; lorenzo.pieralisi@xxxxxxx; robh@xxxxxxxxxx;
> shawnguo@xxxxxxxxxx; vkoul@xxxxxxxxxx; alexander.stein@xxxxxxxxxxxxxxx;
> marex@xxxxxxx
> Cc: linux-phy@xxxxxxxxxxxxxxxxxxx; devicetree@xxxxxxxxxxxxxxx;
> linux-pci@xxxxxxxxxxxxxxx; linux-arm-kernel@xxxxxxxxxxxxxxxxxxx;
> linux-kernel@xxxxxxxxxxxxxxx; kernel@xxxxxxxxxxxxxx; dl-linux-imx
> <linux-imx@xxxxxxx>
> Subject: Re: [PATCH v3 1/6] reset: imx7: Add the iMX8MP PCIe PHY PERST
> support
>
> Hi Richard,
>
> On Do, 2022-08-18 at 15:02 +0800, Richard Zhu wrote:
> > On i.MX7/iMX8MM/iMX8MQ, the initialized default value of PERST
> > bit(BIT3) of SRC_PCIEPHY_RCR is 1b'1.
> > But i.MX8MP has one inversed default value 1b'0 of PERST bit.
> >
> > And the PERST bit should be kept 1b'1 after power and clocks are stable.
> > So add the i.MX8MP PCIe PHY PERST support here.
>
> the description is good now. It would be nice if this could also be mentioned in
> the Reference Manual.
>
> Please replace "add" with "fix" in the subject, as I requested earlier:
> "reset: imx7: Fix i.MX8MP PCIe PHY PERST support".
>
> And add a fixes line:
>
> Fixes: e08672c03981 ("reset: imx7: Add support for i.MX8MP SoC")
>
> With those two changes,
> Reviewed-by: Philipp Zabel <p.zabel@xxxxxxxxxxxxxx>
>
Hi Philipp:
Okay, would be changed in next version.
Thanks for your review.
Best Regards
Richard Zhu
> regards
> Philipp
