On 8/18/22 09:02, Richard Zhu wrote:
Based on the 6.0-rc1 of the pci/next branch. This series adds the i.MX8MP PCIe support and had been tested on i.MX8MP EVK board when one PCIe NVME device is used. - i.MX8MP PCIe has reversed initial PERST bit value refer to i.MX8MQ/i.MX8MM. Add the PHY PERST explicitly for i.MX8MP PCIe PHY. - Add the i.MX8MP PCIe PHY support in the i.MX8M PCIe PHY driver. And share as much as possible codes with i.MX8MM PCIe PHY. - Add the i.MX8MP PCIe support in binding document, DTS files, and PCIe driver. Main changes v2-->v3: - Fix the schema checking error in the PHY dt-binding patch. - Inspired by Lucas, the PLL configurations might not required when external OSC is used as PCIe referrence clock. It's true. Remove all the HSIO PLL bit manipulations, and PCIe works fine on i.MX8MP EVK board with one NVME device is used. - Drop the #4 patch of v2, since it had been applied by Rob. Main changes v1-->v2: - It's my fault forget including Vinod, re-send v2 after include Vinod and linux-phy@xxxxxxxxxxxxxxxxxxx. - List the basements of this patch-set. The branch, codes changes and so on. - Clean up some useless register and bit definitions in #3 patch. Documentation/devicetree/bindings/phy/fsl,imx8-pcie-phy.yaml | 16 +++++++-- arch/arm64/boot/dts/freescale/imx8mp-evk.dts | 53 +++++++++++++++++++++++++++++ arch/arm64/boot/dts/freescale/imx8mp.dtsi | 46 ++++++++++++++++++++++++- drivers/pci/controller/dwc/pci-imx6.c | 17 +++++++++- drivers/phy/freescale/phy-fsl-imx8m-pcie.c | 150 +++++++++++++++++++++++++++++++++++++++++++++++++++++++++------------------------- drivers/reset/reset-imx7.c | 1 + 6 files changed, 232 insertions(+), 51 deletions(-)
For the entire series: Tested-by: Marek Vasut <marex@xxxxxxx> Thanks !
