Ira Weiny wrote:
> On Mon, Jun 20, 2022 at 11:23:28AM +0100, Jonathan Cameron wrote:
> > On Fri, 17 Jun 2022 15:56:38 -0700
> > Dan Williams <dan.j.williams@xxxxxxxxx> wrote:
> >
>
> [snip]
>
> > > > +static int pci_doe_enable_irq(struct pci_doe_mb *doe_mb, unsigned int irq)
> > > > +{
> > > > + struct pci_dev *pdev = doe_mb->pdev;
> > > > + int offset = doe_mb->cap_offset;
> > > > + int rc;
> > > > +
> > > > + /*
> > > > + * Enabling bus mastering is required for MSI/MSIx. It is safe to call
> > > > + * this multiple times and thus is called here to ensure that mastering
> > > > + * is enabled even if the driver has done so.
> > > > + */
> > >
> > > It is required for MSI/MSIx to work, yes, but if the caller that created
> > > the doe object has not set it yet that's its prerogative.
> >
> > We went around this in one of the earlier threads, and I think consensus
> > was that it made sense to have this in core code.
>
> Yes we did. This is where Bjorn asked for this to be done I thought.
>
> I verified that pci_set_master() is fine to call more than one time. If the
> caller asks for irq support I think it is fine to do this here to ensure that
> support is enabled.
Its moot now that irq support is being pushed out to a follow-on
change, but I think its unfortunate that this makes it difficult to
audit when and where a device will be enabled to send cycles. If at all
possible I think it makes sense to keep this the responsibility of the
driver for the pci_dev. Similar to how pcie_port_device_register() does
this on behalf of the services it registers rather than each service
doing this itself.
