On Tue, Jun 21, 2022 at 10:27:31AM +0800, Kai-Heng Feng wrote: > On Mon, Apr 18, 2022 at 10:41 AM Sathyanarayanan Kuppuswamy > <sathyanarayanan.kuppuswamy@xxxxxxxxxxxxxxx> wrote: > > On 4/8/22 8:31 AM, Kai-Heng Feng wrote: > > > On Intel Alder Lake platforms, Thunderbolt entering D3cold can cause > > > some errors reported by AER: > > > [ 30.100211] pcieport 0000:00:1d.0: AER: Uncorrected (Non-Fatal) error received: 0000:00:1d.0 > > > [ 30.100251] pcieport 0000:00:1d.0: PCIe Bus Error: severity=Uncorrected (Non-Fatal), type=Transaction Layer, (Requester ID) > > > [ 30.100256] pcieport 0000:00:1d.0: device [8086:7ab0] error status/mask=00100000/00004000 > > > [ 30.100262] pcieport 0000:00:1d.0: [20] UnsupReq (First) > > > [ 30.100267] pcieport 0000:00:1d.0: AER: TLP Header: 34000000 08000052 00000000 00000000 > > > [ 30.100372] thunderbolt 0000:0a:00.0: AER: can't recover (no error_detected callback) > > > [ 30.100401] xhci_hcd 0000:3e:00.0: AER: can't recover (no error_detected callback) > > > [ 30.100427] pcieport 0000:00:1d.0: AER: device recovery failed > > > > > > Since AER is disabled in previous patch for a Link in L2/L3 Ready, L2 > > > and L3, also disable DPC here as DPC depends on AER to work. > > > > > > Bugzilla:https://bugzilla.kernel.org/show_bug.cgi?id=215453 > > > Reviewed-by: Mika Westerberg<mika.westerberg@xxxxxxxxxxxxxxx> > > > Signed-off-by: Kai-Heng Feng<kai.heng.feng@xxxxxxxxxxxxx> > > > > Reviewed-by: Kuppuswamy Sathyanarayanan > > <sathyanarayanan.kuppuswamy@xxxxxxxxxxxxxxx> > > A gentle ping... See questions here: https://lore.kernel.org/r/20220422222433.GA1464120@bhelgaas
