On Wed, Jun 08, 2022 at 01:52:34PM +0300, Dmitry Baryshkov wrote: > On recent Qualcomm platforms the QMP PIPE clocks feed into a set of > muxes which must be parked to the "safe" source (bi_tcxo) when > corresponding GDSC is turned off and on again. Currently this is > handcoded in the PCIe driver by reparenting the gcc_pipe_N_clk_src > clock. However the same code sequence should be applied in the > pcie-qcom endpoint, USB3 and UFS drivers. > > Rather than copying this sequence over and over again, follow the > example of clk_rcg2_shared_ops and implement this parking in the > enable() and disable() clock operations. Supplement the regmap-mux with > the new clk_regmap_phy_mux type, which implements such multiplexers > as a simple gate clocks. > > This is possible since each of these multiplexers has just two clock > sources: one coming from the PHY and a reference (XO) one. If the clock > is running off the from-PHY source, report it as enabled. Report it as > disabled otherwise (if it uses reference source). > > This way the PHY will disable the pipe clock before turning off the > GDSC, which in turn would lead to disabling corresponding pipe_clk_src > (and thus it being parked to a safe, reference clock source). And vice > versa, after enabling the GDSC the PHY will enable the pipe clock, which > would cause pipe_clk_src to be switched from a safe source to the > working one. > > Reviewed-by: Johan Hovold <johan+linaro@xxxxxxxxxx> > Tested-by: Johan Hovold <johan+linaro@xxxxxxxxxx> > Reported-by: kernel test robot <lkp@xxxxxxxxx> FWIW, I dropped this Reported-by tag because I don't think it's really relevant to this patch. I think it's from this lkp report: https://lore.kernel.org/r/202206052344.Lkv2vI5x-lkp@xxxxxxxxx but that link wasn't included here and I don't think there's value in including this detail about a minor build issue that was fixed before the patch was ever applied anywhere. Bjorn
