On Mon, Jun 13, 2022 at 05:35:20PM -0500, Bjorn Helgaas wrote:
> On Mon, Jun 13, 2022 at 11:16:41PM +0300, Andy Shevchenko wrote:
> > The resource management improve for PCI on x86 broke booting of Intel MID
> > platforms. It seems that the current code removes all available resources
> > from the list and none of the PCI device may be initialized. Restore the
> > old behaviour by force disabling the e820 usage for the resource allocation.
> >
> > Fixes: 4c5e242d3e93 ("x86/PCI: Clip only host bridge windows for E820 regions")
> > Depends-on: fa6dae5d8208 ("x86/PCI: Add kernel cmdline options to use/ignore E820 reserved regions")
> > Signed-off-by: Andy Shevchenko <andriy.shevchenko@xxxxxxxxxxxxxxx>
>
> Yeah, I blew it with 4c5e242d3e93. Can you provide more details on
> how the MID platforms broke?
It's not so easy. The breakage seems affects the console driver and earlycon
doesn't work. erlyprintk doesn't support 32-bit MMIO addresses (again,
addresses, not data size). That said, there is nothing to show at all.
What I did, I have bisected to your patch, commented out the call and instead
added a printk() to see what it does, and it basically removed all resources
listed in _CRS.
> Since you set "pci_use_e820 = false" for
> MID below, I assume MID doesn't depend on the e820 clipping and thus
> should not break if we turn off clipping by default in 2023 as in
> 0ae084d5a674 ("x86/PCI: Disable E820 reserved region clipping starting
> in 2023").
> But it'd be nice to see the dmesg log and make sure.
Nothing to provide (see above why), sorry.
--
With Best Regards,
Andy Shevchenko
