On Fri, May 27, 2022 at 12:13 AM Bjorn Helgaas <helgaas@xxxxxxxxxx> wrote:
>
> On Thu, Mar 31, 2022 at 07:38:51PM +0200, Rafael J. Wysocki wrote:
> > From: Rafael J. Wysocki <rafael.j.wysocki@xxxxxxxxx>
> >
> > If one of the PCIe root ports on Elo i2 is put into D3cold and then
> > back into D0, the downstream device becomes permanently inaccessible,
> > so add a bridge D3 DMI quirk for that system.
> >
> > This was exposed by commit 14858dcc3b35 ("PCI: Use
> > pci_update_current_state() in pci_enable_device_flags()"), but before
> > that commit the root port in question had never been put into D3cold
> > for real due to a mismatch between its power state retrieved from the
> > PCI_PM_CTRL register (which was accessible even though the platform
> > firmware indicated that the port was in D3cold) and the state of an
> > ACPI power resource involved in its power management.
> >
> > BugLink: https://bugzilla.kernel.org/show_bug.cgi?id=215715
> > Reported-by: Stefan Gottwald <gottwald@xxxxxxxx>
> > Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@xxxxxxxxx>
> > ---
> > drivers/pci/pci.c | 10 ++++++++++
> > 1 file changed, 10 insertions(+)
> >
> > Index: linux-pm/drivers/pci/pci.c
> > ===================================================================
> > --- linux-pm.orig/drivers/pci/pci.c
> > +++ linux-pm/drivers/pci/pci.c
> > @@ -2920,6 +2920,16 @@ static const struct dmi_system_id bridge
> > DMI_MATCH(DMI_BOARD_VENDOR, "Gigabyte Technology Co., Ltd."),
> > DMI_MATCH(DMI_BOARD_NAME, "X299 DESIGNARE EX-CF"),
> > },
> > + /*
> > + * Downstream device is not accessible after putting a root port
> > + * into D3cold and back into D0 on Elo i2.
> > + */
> > + .ident = "Elo i2",
> > + .matches = {
> > + DMI_MATCH(DMI_SYS_VENDOR, "Elo Touch Solutions"),
> > + DMI_MATCH(DMI_PRODUCT_NAME, "Elo i2"),
> > + DMI_MATCH(DMI_PRODUCT_VERSION, "RevB"),
> > + },
> > },
>
> This has already made it to Linus' and some stable trees, but I think
> we need the following touchup. I plan to send it right after my v5.19
> pull request.
Ouch, sorry.
> commit a99f6bb133df ("PCI/PM: Fix bridge_d3_blacklist[] Elo i2 overwrite of Gigabyte X299")
> Author: Bjorn Helgaas <bhelgaas@xxxxxxxxxx>
> Date: Thu May 26 16:52:23 2022 -0500
>
> PCI/PM: Fix bridge_d3_blacklist[] Elo i2 overwrite of Gigabyte X299
>
> 92597f97a40b ("PCI/PM: Avoid putting Elo i2 PCIe Ports in D3cold") omitted
> braces around the new Elo i2 entry, so it overwrote the existing Gigabyte
> X299 entry.
>
> Found by:
>
> $ make W=1 drivers/pci/pci.o
> CC drivers/pci/pci.o
> drivers/pci/pci.c:2974:12: error: initialized field overwritten [-Werror=override-init]
> 2974 | .ident = "Elo i2",
> | ^~~~~~~~
>
> Fixes: 92597f97a40b ("PCI/PM: Avoid putting Elo i2 PCIe Ports in D3cold")
> Signed-off-by: Bjorn Helgaas <bhelgaas@xxxxxxxxxx>
> Cc: stable@xxxxxxxxxxxxxxx # v5.15+
>
> diff --git a/drivers/pci/pci.c b/drivers/pci/pci.c
> index d25122fbe98a..5b400a742621 100644
> --- a/drivers/pci/pci.c
> +++ b/drivers/pci/pci.c
> @@ -2920,6 +2920,8 @@ static const struct dmi_system_id bridge_d3_blacklist[] = {
> DMI_MATCH(DMI_BOARD_VENDOR, "Gigabyte Technology Co., Ltd."),
> DMI_MATCH(DMI_BOARD_NAME, "X299 DESIGNARE EX-CF"),
> },
> + },
> + {
> /*
> * Downstream device is not accessible after putting a root port
> * into D3cold and back into D0 on Elo i2.
