From: Rafael J. Wysocki <rafael.j.wysocki@xxxxxxxxx>
If one of the PCIe root ports on Elo i2 is put into D3cold and then
back into D0, the downstream device becomes permanently inaccessible,
so add a bridge D3 DMI quirk for that system.
This was exposed by commit 14858dcc3b35 ("PCI: Use
pci_update_current_state() in pci_enable_device_flags()"), but before
that commit the root port in question had never been put into D3cold
for real due to a mismatch between its power state retrieved from the
PCI_PM_CTRL register (which was accessible even though the platform
firmware indicated that the port was in D3cold) and the state of an
ACPI power resource involved in its power management.
BugLink: https://bugzilla.kernel.org/show_bug.cgi?id=215715
Reported-by: Stefan Gottwald <gottwald@xxxxxxxx>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@xxxxxxxxx>
---
drivers/pci/pci.c | 10 ++++++++++
1 file changed, 10 insertions(+)
Index: linux-pm/drivers/pci/pci.c
===================================================================
--- linux-pm.orig/drivers/pci/pci.c
+++ linux-pm/drivers/pci/pci.c
@@ -2920,6 +2920,16 @@ static const struct dmi_system_id bridge
DMI_MATCH(DMI_BOARD_VENDOR, "Gigabyte Technology Co., Ltd."),
DMI_MATCH(DMI_BOARD_NAME, "X299 DESIGNARE EX-CF"),
},
+ /*
+ * Downstream device is not accessible after putting a root port
+ * into D3cold and back into D0 on Elo i2.
+ */
+ .ident = "Elo i2",
+ .matches = {
+ DMI_MATCH(DMI_SYS_VENDOR, "Elo Touch Solutions"),
+ DMI_MATCH(DMI_PRODUCT_NAME, "Elo i2"),
+ DMI_MATCH(DMI_PRODUCT_VERSION, "RevB"),
+ },
},
#endif
{ }
