Hi,
fixed reg-error by using 32bit-address in example, in my test output is clean.
+++ b/Documentation/devicetree/bindings/phy/rockchip,pcie3-phy.yaml
@@ -68,7 +68,7 @@ examples:
#include <dt-bindings/clock/rk3568-cru.h>
pcie30phy: phy@fe8c0000 {
compatible = "rockchip,rk3568-pcie3-phy";
- reg = <0x0 0xfe8c0000 0x0 0x20000>;
+ reg = <0xfe8c0000 0x20000>;
i hope yours is clean too
regarding data-lanes instead of own lane-map, Peter and me only find this in special
bindings outside the phy-"namespace" like this.
https://elixir.bootlin.com/linux/v5.18-rc7/source/Documentation/devicetree/bindings/media/video-interfaces.yaml#L157
do you mean converting this binding and add it there and base out binding on it?
https://elixir.bootlin.com/linux/v5.18-rc7/source/Documentation/devicetree/bindings/phy/phy-bindings.txt
regards Frank
