The SRIOV capability, namely page size and total_vfs of a device are
configured during enumeration phase of the device.
This can potentially interfere with the PCI operations of the platform,
if the IOV capability of the device is not enabled.
The following patch postpones the configuration of the IOV capability of the
device to a later point, when the IOV capability is explicitly enabled
by the device driver.
The patch is tested on x86 and power platform.
Signed-off-by: Ram Pai <linuxram@xxxxxxxxxx>
---
drivers/pci/iov.c | 4 ++--
1 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/pci/iov.c b/drivers/pci/iov.c
index b0446dd..c1a6f5c 100644
--- a/drivers/pci/iov.c
+++ b/drivers/pci/iov.c
@@ -346,6 +346,8 @@ static int sriov_enable(struct pci_dev *dev, int nr_virtfn)
return rc;
}
+ pci_write_config_dword(dev, iov->pos + PCI_SRIOV_SYS_PGSIZE, iov->pgsz);
+
iov->ctrl |= PCI_SRIOV_CTRL_VFE | PCI_SRIOV_CTRL_MSE;
pci_block_user_cfg_access(dev);
pci_write_config_word(dev, iov->pos + PCI_SRIOV_CTRL, iov->ctrl);
@@ -451,7 +453,6 @@ static int sriov_init(struct pci_dev *dev, int pos)
found:
pci_write_config_word(dev, pos + PCI_SRIOV_CTRL, ctrl);
- pci_write_config_word(dev, pos + PCI_SRIOV_NUM_VF, total);
pci_read_config_word(dev, pos + PCI_SRIOV_VF_OFFSET, &offset);
pci_read_config_word(dev, pos + PCI_SRIOV_VF_STRIDE, &stride);
if (!offset || (total > 1 && !stride))
@@ -464,7 +465,6 @@ found:
return -EIO;
pgsz &= ~(pgsz - 1);
- pci_write_config_dword(dev, pos + PCI_SRIOV_SYS_PGSIZE, pgsz);
nres = 0;
for (i = 0; i < PCI_SRIOV_NUM_BARS; i++) {
--
1.7.4.1
--
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