On Mon, 21 Feb 2022 14:33:56 +0800, Richard Zhu wrote:
> In the i.MX6QP sabresd board(sch-28857) design, one external oscillator
> is powered up by vgen3 and used as the PCIe reference clock source by
> the endpoint device.
>
> If RC uses this oscillator as reference clock too, PLL6(ENET PLL) would
> has to be in bypass mode, and ENET clocks would be messed up.
>
> [...]
I skipped patch(1) since we don't apply dts changes, those should
go via respective platform maintainers.
[2/2] PCI: imx6: Enable i.MX6QP PCIe power management support
https://git.kernel.org/lpieralisi/pci/c/f81dd043ec
Thanks,
Lorenzo
