On Mon, Feb 21, 2022 at 02:33:56PM +0800, Richard Zhu wrote: > In the i.MX6QP sabresd board(sch-28857) design, one external oscillator > is powered up by vgen3 and used as the PCIe reference clock source by > the endpoint device. > > If RC uses this oscillator as reference clock too, PLL6(ENET PLL) would > has to be in bypass mode, and ENET clocks would be messed up. > > To keep things simple, let RC use the internal PLL as reference clock > and set vgen3 always on to enable the external oscillator for endpoint > device on i.MX6QP sabresd board. > > NOTE: This reference clock setup is used to pass the GEN2 TX compliance > tests, and isn't recommended as a setup in the end-user design. > > Signed-off-by: Richard Zhu <hongxing.zhu@xxxxxxx> Applied, thanks!
