Re: [PATCH] PCI: qcom: Add support for handling MSIs from 8 endpoints

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On 14/12/2021 13:13, Manivannan Sadhasivam wrote:
The DWC controller used in the Qcom Platforms are capable of addressing the
MSIs generated from 8 different endpoints each with 32 vectors (256 in
total). Currently the driver is using the default value of addressing the
MSIs from 1 endpoint only. Extend it by passing the MAX_MSI_IRQS to the
num_vectors field of pcie_port structure.

Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@xxxxxxxxxx>

Tested-by: Dmitry Baryshkov <dmitry.baryshkov@xxxxxxxxxx>

---
  drivers/pci/controller/dwc/pcie-qcom.c | 1 +
  1 file changed, 1 insertion(+)

diff --git a/drivers/pci/controller/dwc/pcie-qcom.c b/drivers/pci/controller/dwc/pcie-qcom.c
index 1c3d1116bb60..8a4c08d815a5 100644
--- a/drivers/pci/controller/dwc/pcie-qcom.c
+++ b/drivers/pci/controller/dwc/pcie-qcom.c
@@ -1550,6 +1550,7 @@ static int qcom_pcie_probe(struct platform_device *pdev)
  	pci->dev = dev;
  	pci->ops = &dw_pcie_ops;
  	pp = &pci->pp;
+	pp->num_vectors = MAX_MSI_IRQS;
pcie->pci = pci;


--
With best wishes
Dmitry



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