The fu740 dw pcie core does not probe devices without this fix from
U-boot. The fix claims to set the link-speed to gen1 to get the probe
to work. As this is a copy from U-boot, the commentary is assumed to
be correct.
Without this in, and without U-boot starting the PCIe the Unmatched
board does not show any PCIe devices after the DW root port.
Signed-off-by: Ben Dooks <ben.dooks@xxxxxxxxxxxxxxx>
---
drivers/pci/controller/dwc/pcie-fu740.c | 19 +++++++++++++++++++
1 file changed, 19 insertions(+)
diff --git a/drivers/pci/controller/dwc/pcie-fu740.c b/drivers/pci/controller/dwc/pcie-fu740.c
index 842b7202b96e..19501ec8c487 100644
--- a/drivers/pci/controller/dwc/pcie-fu740.c
+++ b/drivers/pci/controller/dwc/pcie-fu740.c
@@ -177,11 +177,30 @@ static void fu740_pcie_init_phy(struct fu740_pcie *afp)
fu740_phyregwrite(1, PCIEX8MGMT_PHY_LANE3_BASE, PCIEX8MGMT_PHY_INIT_VAL, afp);
}
+/* This is copied from u-boot. Force system to gen1 otherwise nothing probes
+ * as found on the SiFive Unmatched board.
+ */
+static void fu740_pcie_force_gen1(struct dw_pcie *dw, struct fu740_pcie *afp )
+{
+ unsigned val;
+
+ dw_pcie_dbi_ro_wr_en(dw);
+
+ val = dw_pcie_readl_dbi(dw, 0x70 + PCI_EXP_LNKCAP);
+ pr_info("%s: link-cap was %08x\n", __func__, val);
+ dw_pcie_writel_dbi(dw, 0x70 + PCI_EXP_LNKCAP, val | 0xf);
+
+ dw_pcie_dbi_ro_wr_dis(dw);
+}
+
static int fu740_pcie_start_link(struct dw_pcie *pci)
{
struct device *dev = pci->dev;
struct fu740_pcie *afp = dev_get_drvdata(dev);
+ /* Force PCIe gen1 otherwise Unmatched board does not probe */
+ fu740_pcie_force_gen1(pci, afp);
+
/* Enable LTSSM */
writel_relaxed(0x1, afp->mgmt_base + PCIEX8MGMT_APP_LTSSM_ENABLE);
return 0;
--
2.34.1
