On 22-01-07 10:38:27, Jonathan Cameron wrote:
> On Fri, 7 Jan 2022 10:30:52 +0000
> Jonathan Cameron <Jonathan.Cameron@xxxxxxxxxx> wrote:
>
> > On Thu, 6 Jan 2022 16:37:52 -0800
> > Ben Widawsky <ben.widawsky@xxxxxxxxx> wrote:
> >
> > > Cross host bridge verification primarily determines if the requested
> > > interleave ordering can be achieved by the root decoder, which isn't as
> > > programmable as other decoders.
> > >
> > > The algorithm implemented here is based on the CXL Type 3 Memory Device
> > > Software Guide, chapter 2.13.14
> > >
> > > Signed-off-by: Ben Widawsky <ben.widawsky@xxxxxxxxx>
> >
> > Trivial thing inline.
> >
> > > diff --git a/drivers/cxl/region.c b/drivers/cxl/region.c
> > > index c8e3c48dfbb9..ca559a4b5347 100644
> > > --- a/drivers/cxl/region.c
> > > +++ b/drivers/cxl/region.c
> > > @@ -28,6 +28,17 @@
> > > */
> > >
> > > #define region_ways(region) ((region)->config.eniw)
> > > +#define region_ig(region) (ilog2((region)->config.ig))
> > > +
> > > +#define for_each_cxl_endpoint(ep, region, idx) \
> > > + for (idx = 0, ep = (region)->config.targets[idx]; \
> > > + idx < region_ways(region); \
> > > + idx++, ep = (region)->config.targets[idx])
> > > +
> > > +#define for_each_cxl_decoder_target(target, decoder, idx) \
> > > + for (idx = 0, target = (decoder)->target[idx]; \
> >
> > As target is used too often in here, you'll replace it in ->target[idx] as well.
> > It happens to work today because the parameter always happens to be target
> >
> > > + idx < (decoder)->nr_targets; \
> > > + idx++, target++)
> I should have read the next few lines :)
>
> target++ doesn't get (decoder)->target[idx] which is what we want - it indexes
> off the end of a particular instance rather than through the array.
>
> I'm guessing this was from my unclear comment yesterday. I should have spent
> a little more time being explicit there.
>
> Jonathan
>
> > >
>
Gotcha. I combined the idx increment as well, what do you think about this (just
typed, not tested):
#define for_each_cxl_decoder_target(dport, decoder, idx) \
for (idx = 0, dport = (decoder)->target[idx]; \
idx < (decoder)->nr_targets; \
dport = (decoder)->target[++idx])
