Like PCI_BRIDGE_EMUL_NO_PREFMEM_FORWARD, this new flag specifies that
emulated PCI bridge does not support forwarding of IO requests in given
range between primary and secondary buses. This flag should be used as
argument for pci_bridge_emul_init() for hardware setup without IO support.
Setting this flag cause that IO base and limit registers are read-only.
Signed-off-by: Pali Rohár <pali@xxxxxxxxxx>
---
drivers/pci/pci-bridge-emul.c | 9 +++++++++
drivers/pci/pci-bridge-emul.h | 1 +
2 files changed, 10 insertions(+)
diff --git a/drivers/pci/pci-bridge-emul.c b/drivers/pci/pci-bridge-emul.c
index 432b1bec2e22..033bbeb99176 100644
--- a/drivers/pci/pci-bridge-emul.c
+++ b/drivers/pci/pci-bridge-emul.c
@@ -378,6 +378,15 @@ int pci_bridge_emul_init(struct pci_bridge_emul *bridge,
bridge->pci_regs_behavior[PCI_PREF_MEMORY_BASE / 4].rw = 0;
}
+ if (flags & PCI_BRIDGE_EMUL_NO_IO_FORWARD) {
+ bridge->pci_regs_behavior[PCI_COMMAND / 4].ro |= PCI_COMMAND_IO;
+ bridge->pci_regs_behavior[PCI_COMMAND / 4].rw &= ~PCI_COMMAND_IO;
+ bridge->pci_regs_behavior[PCI_IO_BASE / 4].ro |= GENMASK(15, 0);
+ bridge->pci_regs_behavior[PCI_IO_BASE / 4].rw &= ~GENMASK(15, 0);
+ bridge->pci_regs_behavior[PCI_IO_BASE_UPPER16 / 4].ro = ~0;
+ bridge->pci_regs_behavior[PCI_IO_BASE_UPPER16 / 4].rw = 0;
+ }
+
return 0;
}
EXPORT_SYMBOL_GPL(pci_bridge_emul_init);
diff --git a/drivers/pci/pci-bridge-emul.h b/drivers/pci/pci-bridge-emul.h
index 88877ebefbac..ab33609c598b 100644
--- a/drivers/pci/pci-bridge-emul.h
+++ b/drivers/pci/pci-bridge-emul.h
@@ -121,6 +121,7 @@ struct pci_bridge_emul {
enum {
PCI_BRIDGE_EMUL_NO_PREFMEM_FORWARD = BIT(0),
+ PCI_BRIDGE_EMUL_NO_IO_FORWARD = BIT(1),
};
int pci_bridge_emul_init(struct pci_bridge_emul *bridge,
--
2.20.1
