On Tue, Sep 21, 2021 at 3:05 PM Ben Widawsky <ben.widawsky@xxxxxxxxx> wrote: > > Provide the ability to obtain CXL register blocks as discrete functionality. > This functionality will become useful for other CXL drivers that need access to > CXL register blocks. It is also in line with other additions to core which moves > register mapping functionality. > > At the introduction of the CXL driver the only user of CXL MMIO was cxl_pci > (then known as cxl_mem). As the driver has evolved it is clear that cxl_pci will > not be the only entity that needs access to CXL MMIO. This series stops short of > moving the generalized functionality into cxl_core for the sake of getting eyes > on the important foundational bits sooner rather than later. The ultimate plan > is to move much of the code into cxl_core. > > Via review of two previous patches [1] & [2] it has been suggested that the bits > which are being used for DVSEC enumeration move into PCI core. As CXL core is > soon going to require these, let's try to get the ball rolling now on making > that happen. > > [1]: https://lore.kernel.org/linux-cxl/20210920225638.1729482-1-ben.widawsky@xxxxxxxxx/ > [2]: https://lore.kernel.org/linux-cxl/20210920225638.1729482-1-ben.widawsky@xxxxxxxxx/ > > Ben Widawsky (7): > cxl: Convert "RBI" to enum > cxl/pci: Remove dev_dbg for unknown register blocks > cxl/pci: Refactor cxl_pci_setup_regs > cxl/pci: Make more use of cxl_register_map > PCI: Add pci_find_dvsec_capability to find designated VSEC > cxl/pci: Use pci core's DVSEC functionality > ocxl: Use pci core's DVSEC functionality I also found: siov_find_pci_dvsec() ...and an open coded one in: drivers/mfd/intel_pmt.c::pmt_pci_probe() This one looks too weird to replace: arch/x86/events/intel/uncore_discovery.c::intel_uncore_has_discovery_tables() In any event I'd expect this cover to also be cc'd to those folks.
