Re: [RESEND PATCH V3 3/6] PCI: Add 10-Bit Tag register definitions
[
Date Prev
][
Date Next
][
Thread Prev
][
Thread Next
][
Date Index
][
Thread Index
]
Subject
: Re: [RESEND PATCH V3 3/6] PCI: Add 10-Bit Tag register definitions
From
: Christoph Hellwig <hch@xxxxxxxxxxxxx>
Date
: Mon, 14 Jun 2021 06:50:48 +0100
Cc
: helgaas@xxxxxxxxxx, hch@xxxxxxxxxxxxx, kw@xxxxxxxxx, linux-pci@xxxxxxxxxxxxxxx, rajur@xxxxxxxxxxx, hverkuil-cisco@xxxxxxxxx, linux-media@xxxxxxxxxxxxxxx, netdev@xxxxxxxxxxxxxxx
In-reply-to
: <
1623576555-40338-4-git-send-email-liudongdong3@huawei.com
>
References
: <
1623576555-40338-1-git-send-email-liudongdong3@huawei.com
> <
1623576555-40338-4-git-send-email-liudongdong3@huawei.com
>
Looks good, Reviewed-by: Christoph Hellwig <hch@xxxxxx>
References
:
[RESEND PATCH V3 0/6] PCI: Enable 10-Bit tag support for PCIe devices
From:
Dongdong Liu
[RESEND PATCH V3 3/6] PCI: Add 10-Bit Tag register definitions
From:
Dongdong Liu
Prev by Date:
Re: [RESEND PATCH V3 2/6] PCI: Use cached Device Capabilities 2 Register
Next by Date:
[PATCH] PCI/P2PDMA: simplify distance calculation
Previous by thread:
[RESEND PATCH V3 3/6] PCI: Add 10-Bit Tag register definitions
Next by thread:
[RESEND PATCH V3 5/6] PCI/IOV: Enable 10-Bit tag support for PCIe VF devices
Index(es):
Date
Thread
[Index of Archives]
[DMA Engine]
[Linux Coverity]
[Linux USB]
[Video for Linux]
[Linux Audio Users]
[Yosemite News]
[Linux Kernel]
[Linux SCSI]
[Greybus]