[AMD Public Use] > -----Original Message----- > From: Keith Busch <kbusch@xxxxxxxxxx> > Sent: Thursday, May 20, 2021 2:04 PM > To: Deucher, Alexander <Alexander.Deucher@xxxxxxx> > Cc: Bjorn Helgaas <helgaas@xxxxxxxxxx>; Liang, Prike > <Prike.Liang@xxxxxxx>; linux-pci@xxxxxxxxxxxxxxx; axboe@xxxxxx; > hch@xxxxxx; sagi@xxxxxxxxxxx; linux-nvme@xxxxxxxxxxxxxxxxxxx; > stable@xxxxxxxxxxxxxxx; S-k, Shyam-sundar <Shyam-sundar.S-k@xxxxxxx>; > Chaitanya Kulkarni <chaitanya.kulkarni@xxxxxxx>; Rafael J. Wysocki > <rjw@xxxxxxxxxxxxx>; linux-pm@xxxxxxxxxxxxxxx > Subject: Re: [PATCH v5 1/2] PCI: add AMD PCIe quirk for nvme shutdown opt > > On Thu, May 20, 2021 at 05:40:54PM +0000, Deucher, Alexander wrote: > > It doesn't really have anything to do with PCI. The PCI link is just > > a proxy for specific AMD platforms. It's platform firmware behavior > > we are catering to. This was originally posted as an nvme quirk, but > > during the review it was recommended to move the quirk into PCI > > because the quirk is not specific a particular NVMe device, but rather > > a set of AMD platforms. Lots of other platforms seems to do similar > > things in the nvme driver based on ACPI or DMI flags, etc. On our > > hardware this nvme flag is required for all cezanne and renoir platforms. > > The quirk was initially presented as specific to the pci root. Does it make > more sense for nvme to recognize the limitation from querying a different > platform component instead of the pci bus? Maybe. I'm not sure what the best way to tie this to a specific platform is. @Limonciello, Mario? Alex
