On Wed, Apr 28, 2021 at 11:15 PM Bjorn Helgaas <helgaas@xxxxxxxxxx> wrote: > > On Mon, Apr 26, 2021 at 04:36:24PM +0200, Ian Kumlien wrote: > > On Thu, Feb 25, 2021 at 11:03 PM Bjorn Helgaas <helgaas@xxxxxxxxxx> wrote: > > > > > > On Wed, Feb 24, 2021 at 11:19:55PM +0100, Ian Kumlien wrote: > > > > [... 8<...] > > > > > I think the most useful information would be the ASPM configuration of > > > the tree rooted at 00:01.2 under Windows, since there the NIC should > > > be supported and have good performance. > > > > So the AMD bios patches to fix USB issues seems to have fixed this > > issue as well! > > Really? That's amazing! I assume they did this by changing the exit > or acceptable latency values? > > It would be really interesting to see the "lspci -vv" output after the > BIOS update. First time I looked there was no difference... for x in 00:01.2 01:00.0 02:03.0 03:00.0 ; do lspci -vvvv -s $x |grep Latency ; done Latency: 0, Cache Line Size: 64 bytes LnkCap: Port #0, Speed 16GT/s, Width x8, ASPM L1, Exit Latency L1 <32us Latency: 0, Cache Line Size: 64 bytes LnkCap: Port #0, Speed 16GT/s, Width x8, ASPM L1, Exit Latency L1 <32us Latency: 0, Cache Line Size: 64 bytes LnkCap: Port #3, Speed 16GT/s, Width x1, ASPM L1, Exit Latency L1 <32us Latency: 0, Cache Line Size: 64 bytes DevCap: MaxPayload 512 bytes, PhantFunc 0, Latency L0s <512ns, L1 <64us LnkCap: Port #3, Speed 2.5GT/s, Width x1, ASPM L0s L1, Exit Latency L0s <2us, L1 <16us I think they actually fixed a issue behind the scenes > Thanks a lot for following up on this! Sorry about the delay - work + looking at a switch with a dodgy lldp bug :/ > Bjorn
