[AMD Public Use] + linux-pci for further review. Thanks, > -----Original Message----- > From: Liang, Prike <Prike.Liang@xxxxxxx> > Sent: Thursday, April 22, 2021 9:19 AM > To: linux-nvme@xxxxxxxxxxxxxxxxxxx; kbusch@xxxxxxxxxx; hch@xxxxxxxxxxxxx; > Chaitanya.Kulkarni@xxxxxxx; gregkh@xxxxxxxxxxxxxxxxxxx > Cc: stable@xxxxxxxxxxxxxxx; Deucher, Alexander > <Alexander.Deucher@xxxxxxx>; S-k, Shyam-sundar <Shyam-sundar.S- > k@xxxxxxx>; Liang, Prike <Prike.Liang@xxxxxxx>; Chaitanya Kulkarni > <chaitanya.kulkarni@xxxxxxx> > Subject: [PATCH v5 2/2] nvme-pci: add AMD PCIe quirk for simple > suspend/resume > > In the NVMe controller default suspend-resume seems only save/restore the > NVMe link state by APST opt and the NVMe remains in D0 during this time. > Then the NVMe device will be shutdown by SMU firmware in the s2idle entry > and then will lost the NVMe power context during s2idle resume.Finally, the > NVMe command queue request will be processed abnormally and result in > access timeout.This issue can be settled by using PCIe power set with simple > suspend-resume process path instead of APST get/set opt. > > This patch is updating the nvme_acpi_storage_d3() with previously added > quirk. > > Cc: <stable@xxxxxxxxxxxxxxx> # 5.10+ > Signed-off-by: Prike Liang <Prike.Liang@xxxxxxx> > Signed-off-by: Shyam Sundar S K <Shyam-sundar.S-k@xxxxxxx> > [ck: split patches for nvme and pcie] > Signed-off-by: Chaitanya Kulkarni <chaitanya.kulkarni@xxxxxxx> > Suggested-by: Keith Busch <kbusch@xxxxxxxxxx> > Acked-by: Keith Busch <kbusch@xxxxxxxxxx> > --- > Changes in v2: > Fix the patch format and check chip root complex DID instead of PCIe RP to > avoid the storage device plugged in internal PCIe RP by USB adaptor. > > Changes in v3: > According to Christoph Hellwig do NVME PCIe related identify opt better in > PCIe quirk driver rather than in NVME module. > > Changes in v4: > Split the fix to PCIe and NVMe part and then call the pci_dev_put() put the > device reference count and finally refine the commit info. > > Changes in v5: > According to Christoph Hellwig and Keith Busch better use a passthrough > device(bus) gloable flag to identify the NVMe shutdown opt rather than look > up the device BDF. > --- > drivers/nvme/host/pci.c | 2 ++ > 1 file changed, 2 insertions(+) > > diff --git a/drivers/nvme/host/pci.c b/drivers/nvme/host/pci.c index > 6bad4d4..617256e 100644 > --- a/drivers/nvme/host/pci.c > +++ b/drivers/nvme/host/pci.c > @@ -2836,6 +2836,8 @@ static bool nvme_acpi_storage_d3(struct pci_dev > *dev) > acpi_status status; > u8 val; > > +if (dev->bus->bus_flags & PCI_BUS_FLAGS_DISABLE_ON_S2I) > +return true; > /* > * Look for _DSD property specifying that the storage device on the > port > * must use D3 to support deep platform power savings during > -- > 2.7.4
