On Mon, Apr 12, 2021 at 04:04:51PM +0200, Pali Rohár wrote: > On Sunday 11 April 2021 20:25:55 Keith Busch wrote: > > On Sat, Apr 10, 2021 at 06:26:22PM +0200, Lukas Wunner wrote: > > > > > > 1.5 sec is definitely too long. This sounds like a quirk of this > > > specific hardware. Try to find out if the hardware can be configured > > > differently to respond quicker. > > > > While 1.5 sec is long, pcie spec's device control 2 register has an option to > > be even longer: up to 64 seconds for a config access timeout! I'm not sure of > > the reasoning to allow something that high, but I think the operating system > > would be not be too happy with that. > > So what can we do in this case? On single core CPU it means that raw > spin lock would completely block any operation on CPU for 64 seconds. I don't think it would work here. I'm just saying that while 1.5s config access is quite long, the spec provides an option where times exceeding that are expected. I have never seen a device configured that way, though. The completion timeouts are usually set in milliseconds. > Do you know what is the timeout for other registers? The Device Control Register 2 timeout value is the setting for all non-posted requests.
