On 2021/3/27 18:47, Dongdong Liu wrote:
> The hisilicon-pcie.txt file is no longer useful since commit
> c2fa6cf76d20 (PCI: dwc: hisi: Remove non-ECAM HiSilicon
> hip05/hip06 driver), so delete it.
No, it is no needed now. Thanks for removing this, and please
also remove related code in MAINTAINERS file :)
Best,
Zhou
>
> Signed-off-by: Dongdong Liu <liudongdong3@xxxxxxxxxx>
> ---
> .../devicetree/bindings/pci/hisilicon-pcie.txt | 43 ----------------------
> 1 file changed, 43 deletions(-)
> delete mode 100644 Documentation/devicetree/bindings/pci/hisilicon-pcie.txt
>
> diff --git a/Documentation/devicetree/bindings/pci/hisilicon-pcie.txt b/Documentation/devicetree/bindings/pci/hisilicon-pcie.txt
> deleted file mode 100644
> index d6796ef..0000000
> --- a/Documentation/devicetree/bindings/pci/hisilicon-pcie.txt
> +++ /dev/null
> @@ -1,43 +0,0 @@
> -HiSilicon Hip05 and Hip06 PCIe host bridge DT description
> -
> -HiSilicon PCIe host controller is based on the Synopsys DesignWare PCI core.
> -It shares common functions with the PCIe DesignWare core driver and inherits
> -common properties defined in
> -Documentation/devicetree/bindings/pci/designware-pcie.txt.
> -
> -Additional properties are described here:
> -
> -Required properties
> -- compatible: Should contain "hisilicon,hip05-pcie" or "hisilicon,hip06-pcie".
> -- reg: Should contain rc_dbi, config registers location and length.
> -- reg-names: Must include the following entries:
> - "rc_dbi": controller configuration registers;
> - "config": PCIe configuration space registers.
> -- msi-parent: Should be its_pcie which is an ITS receiving MSI interrupts.
> -- port-id: Should be 0, 1, 2 or 3.
> -
> -Optional properties:
> -- status: Either "ok" or "disabled".
> -- dma-coherent: Present if DMA operations are coherent.
> -
> -Hip05 Example (note that Hip06 is the same except compatible):
> - pcie@b0080000 {
> - compatible = "hisilicon,hip05-pcie", "snps,dw-pcie";
> - reg = <0 0xb0080000 0 0x10000>, <0x220 0x00000000 0 0x2000>;
> - reg-names = "rc_dbi", "config";
> - bus-range = <0 15>;
> - msi-parent = <&its_pcie>;
> - #address-cells = <3>;
> - #size-cells = <2>;
> - device_type = "pci";
> - dma-coherent;
> - ranges = <0x82000000 0 0x00000000 0x220 0x00000000 0 0x10000000>;
> - num-lanes = <8>;
> - port-id = <1>;
> - #interrupt-cells = <1>;
> - interrupt-map-mask = <0xf800 0 0 7>;
> - interrupt-map = <0x0 0 0 1 &mbigen_pcie 1 10
> - 0x0 0 0 2 &mbigen_pcie 2 11
> - 0x0 0 0 3 &mbigen_pcie 3 12
> - 0x0 0 0 4 &mbigen_pcie 4 13>;
> - };
>
