On 11/26/2020 5:59 AM, Rafał Miłecki wrote:
> From: Rafał Miłecki <rafal@xxxxxxxxxx>
>
> BCM4908 uses external MISC block for controlling PERST# signal. Use it
> as a reset controller.
>
> Signed-off-by: Rafał Miłecki <rafal@xxxxxxxxxx>
> ---
> enum pcie_type {
> + BCM4908,
> GENERIC,
This needs to be moved after GENERIC such that GENERIC == 0
> BCM7278,
> BCM2711,
> @@ -230,6 +233,13 @@ static const struct pcie_cfg_data generic_cfg = {
> .bridge_sw_init_set = brcm_pcie_bridge_sw_init_set_generic,
> };
>
> +static const struct pcie_cfg_data bcm4908_cfg = {
> + .offsets = pcie_offsets,
> + .type = BCM4908,
> + .perst_set = brcm_pcie_perst_set_4908,
> + .bridge_sw_init_set = brcm_pcie_bridge_sw_init_set_generic,
> +};
> +
> static const int pcie_offset_bcm7278[] = {
> [RGR1_SW_INIT_1] = 0xc010,
> [EXT_CFG_INDEX] = 0x9000,
> @@ -282,6 +292,7 @@ struct brcm_pcie {
> const int *reg_offsets;
> enum pcie_type type;
> struct reset_control *rescal;
> + struct reset_control *perst_reset;
> int num_memc;
> u64 memc_size[PCIE_BRCM_MAX_MEMC];
> u32 hw_rev;
> @@ -747,6 +758,18 @@ static inline void brcm_pcie_bridge_sw_init_set_7278(struct brcm_pcie *pcie, u32
> writel(tmp, pcie->base + PCIE_RGR1_SW_INIT_1(pcie));
> }
>
> +static inline void brcm_pcie_perst_set_4908(struct brcm_pcie *pcie, u32 val)
> +{
> + if (WARN_ONCE(!pcie->perst_reset, "missing PERST# reset controller\n") ||
> + WARN_ONCE(pcie->hw_rev >= BRCM_PCIE_HW_REV_3_20, "unsupported hardware revision\n"))
> + return;
> +
> + if (val)
> + reset_control_assert(pcie->perst_reset);
> + else
> + reset_control_deassert(pcie->perst_reset);
> +}
> +
> static inline void brcm_pcie_perst_set_7278(struct brcm_pcie *pcie, u32 val)
> {
> u32 tmp;
> @@ -1206,6 +1229,7 @@ static int brcm_pcie_remove(struct platform_device *pdev)
>
> static const struct of_device_id brcm_pcie_match[] = {
> { .compatible = "brcm,bcm2711-pcie", .data = &bcm2711_cfg },
> + { .compatible = "brcm,bcm4908-pcie", .data = &bcm4908_cfg },
> { .compatible = "brcm,bcm7211-pcie", .data = &generic_cfg },
> { .compatible = "brcm,bcm7278-pcie", .data = &bcm7278_cfg },
> { .compatible = "brcm,bcm7216-pcie", .data = &bcm7278_cfg },
> @@ -1262,11 +1286,18 @@ static int brcm_pcie_probe(struct platform_device *pdev)
> clk_disable_unprepare(pcie->clk);
> return PTR_ERR(pcie->rescal);
> }
> + pcie->perst_reset = devm_reset_control_get_optional_shared(&pdev->dev, "perst");
Is not this an exclusive reset?
> + if (IS_ERR(pcie->perst_reset)) {
> + clk_disable_unprepare(pcie->clk);
> + return PTR_ERR(pcie->perst_reset);
> + }
>
> ret = reset_control_deassert(pcie->rescal);
> if (ret)
> dev_err(&pdev->dev, "failed to deassert 'rescal'\n");
>
> + pcie->hw_rev = readl(pcie->base + PCIE_MISC_REVISION);
This is likely going to cause a regression on STB, you cannot read from
most PCIe registers except the main bridge register until after
brcm_pcie_setup() has been called. I do not find the warning on an
unknown revision to be particularly helpful, can you consider leaving
the hw_rev read where it is and not warn?
--
Florian
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