On Mon, Nov 02, 2020 at 03:57:12PM -0500, Jim Quinlan wrote:
> The variable 'tmp' is used multiple times in the brcm_pcie_setup()
> function. One such usage did not initialize 'tmp' to the current value of
> the target register. By luck the mistake does not currently affect
> behavior; regardless 'tmp' is now initialized properly.
This is so trivial that there's probably no reason to post this again,
but if you post a v2 for some reason, please update the subject to
match the convention ("PCI: brcmstb: Verb ..."), e.g.,
PCI: brcmstb: Initialize "tmp" before use
The commit log does not say what the patch does, leaving it to the
reader to infer it.
Lorenzo will likely fix this up when he applies it.
Incidental curiosity: where should I look to see what
u32p_replace_bits() does? "git grep u32p_replace_bits" shows several
calls, but no definitions.
> Fixes: c0452137034b ("PCI: brcmstb: Add Broadcom STB PCIe host controller driver")
> Suggested-by: Rafał Miłecki <zajec5@xxxxxxxxx>
> Signed-off-by: Jim Quinlan <james.quinlan@xxxxxxxxxxxx>
> ---
> drivers/pci/controller/pcie-brcmstb.c | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/drivers/pci/controller/pcie-brcmstb.c b/drivers/pci/controller/pcie-brcmstb.c
> index bea86899bd5d..9c3d2982248d 100644
> --- a/drivers/pci/controller/pcie-brcmstb.c
> +++ b/drivers/pci/controller/pcie-brcmstb.c
> @@ -893,6 +893,7 @@ static int brcm_pcie_setup(struct brcm_pcie *pcie)
> burst = 0x2; /* 512 bytes */
>
> /* Set SCB_MAX_BURST_SIZE, CFG_READ_UR_MODE, SCB_ACCESS_EN */
> + tmp = readl(base + PCIE_MISC_MISC_CTRL);
> u32p_replace_bits(&tmp, 1, PCIE_MISC_MISC_CTRL_SCB_ACCESS_EN_MASK);
> u32p_replace_bits(&tmp, 1, PCIE_MISC_MISC_CTRL_CFG_READ_UR_MODE_MASK);
> u32p_replace_bits(&tmp, burst, PCIE_MISC_MISC_CTRL_MAX_BURST_SIZE_MASK);
> --
> 2.17.1
>
