On Monday 31 August 2009 06:19:10 pm Kenji Kaneshige wrote: > I was wondering if I could ask you a favor. The program_hpp_type0() > programs latency timer and cache-line size even for PCI-E, but I > don't think we need to program those values for PCI-E. It is original > pciehp's behavior, but could you consider fixing it in you set of > patches? It's true that the latency timer and cache-line size are not relevant for PCIe devices (but it appears harmless to write them). However, my reading of sections 7.5.1.1 and 7.5.1.7 of the PCI Express Base Spec (rev 1.1) is that SERR and PERR are still relevant, though we may prefer the new PCI Express error reporting mechanism. So I agree with you that there's an opportunity to make this better, but I don't feel qualified to change that behavior because I don't understand the interaction with PCI Express error reporting. Bjorn -- To unsubscribe from this list: send the line "unsubscribe linux-pci" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
