[PATCH 0/7] PCI ASPM: more detailed ASPM configuration (v.3)

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Hi,

Here is updated version (v.3) of patches for ASPM.

The major purposes of this set of patches are:

  - Supporting partial ASPM enablement
  - Supporting per direction L0s management.

ChangeLog:
[v.2 -> v.3]
  - Fixed a bug that might cause infinit loop (feedback from Li Shaohua)
  - Changed partial ASPM enablement to enable L0s only when L0s is
    supported in both upstream compornent and downstream component of
    the link (feedback from Li Shaohua).

[v.1 -> v.2]
  - Separated a patch into smaller pieces (seven patches).
  - Fixed a bug that default ASPM state is not saved.
  - Fixed comment typo in pcie_aspm_cap_init().
  - Added 'break;' to list_for_each_entry() loop to avoid redundant
    loop in pcie_aspm_cap_init().
  - Removed pcie_aspm_check_latency() function prototype by changing
    the location of pcie_aspm_check_latency() was changed.

The patches are:
  - [PATCH 1/7] PCI ASPM: do not clear enabled field by support field
  - [PATCH 2/7] PCI ASPM: remove redundant list check
  - [PATCH 3/7] PCI ASPM: fix possible null pointer dereference
  - [PATCH 4/7] PCI ASPM: introduce disable flag
  - [PATCH 5/7] PCI ASPM: introduce capable flag
  - [PATCH 6/7] PCI ASPM: support partial aspm enablement
  - [PATCH 7/7] PCI ASPM: support per direction l0s management

Thanks,
Kenji Kaneshige

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