Hi Martin,
I'd like to present this change for your consideration. I'm not sure
where the original idea comes from that MSI has a 'queue' of interrupts.
It has multiple independent interrupts. Also, rather than just dumping
the raw values from the register, it makes sense to decode them into
the number of interrupts it supports.
diff -urp pciutils-3.0.0/lspci.c pciutils-willy/lspci.c
--- pciutils-3.0.0/lspci.c 2008-04-10 15:15:47.000000000 -0400
+++ pciutils-willy/lspci.c 2008-06-25 16:23:13.000000000 -0400
@@ -922,11 +922,11 @@ cap_msi(struct device *d, int where, int
u32 t;
u16 w;
- printf("Message Signalled Interrupts: Mask%c 64bit%c Queue=%d/%d Enable%c\n",
+ printf("Message Signalled Interrupts: Mask%c 64bit%c Count=%d/%d Enable%c\n",
FLAG(cap, PCI_MSI_FLAGS_MASK_BIT),
FLAG(cap, PCI_MSI_FLAGS_64BIT),
- (cap & PCI_MSI_FLAGS_QSIZE) >> 4,
- (cap & PCI_MSI_FLAGS_QMASK) >> 1,
+ 1 << ((cap & PCI_MSI_FLAGS_QSIZE) >> 4),
+ 1 << ((cap & PCI_MSI_FLAGS_QMASK) >> 1),
FLAG(cap, PCI_MSI_FLAGS_ENABLE));
if (verbose < 2)
return;
--
Intel are signing my paycheques ... these opinions are still mine
"Bill, look, we understand that you're interested in selling us this
operating system, but compare it to ours. We can't possibly take such
a retrograde step."
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