checkpatch said that msi.c has 22 errors and 6 warnings, and also
that msi.h has 3 errors. This patch cleans them all.
Signed-off-by: Hidetoshi Seto <seto.hidetoshi@xxxxxxxxxxxxxx>
---
drivers/pci/msi.c | 85 +++++++++++++++++++++++++---------------------------
drivers/pci/msi.h | 4 +-
2 files changed, 43 insertions(+), 46 deletions(-)
diff --git a/drivers/pci/msi.c b/drivers/pci/msi.c
index f62f941..b5decf3 100644
--- a/drivers/pci/msi.c
+++ b/drivers/pci/msi.c
@@ -16,9 +16,8 @@
#include <linux/proc_fs.h>
#include <linux/msi.h>
#include <linux/smp.h>
-
-#include <asm/errno.h>
-#include <asm/io.h>
+#include <linux/errno.h>
+#include <linux/io.h>
#include "pci.h"
#include "msi.h"
@@ -54,7 +53,8 @@ arch_setup_msi_irqs(struct pci_dev *dev, int nvec, int type)
return 0;
}
-void __attribute__ ((weak)) arch_teardown_msi_irq(unsigned int irq)
+void __attribute__ ((weak))
+arch_teardown_msi_irq(unsigned int irq)
{
return;
}
@@ -170,7 +170,7 @@ static void msi_set_mask_bits(unsigned int irq, u32 mask, u32 flag)
void read_msi_msg(unsigned int irq, struct msi_msg *msg)
{
struct msi_desc *entry = get_irq_msi(irq);
- switch(entry->msi_attrib.type) {
+ switch (entry->msi_attrib.type) {
case PCI_CAP_ID_MSI:
{
struct pci_dev *dev = entry->dev;
@@ -192,16 +192,16 @@ void read_msi_msg(unsigned int irq, struct msi_msg *msg)
}
case PCI_CAP_ID_MSIX:
{
- void __iomem *base;
- base = entry->mask_base +
+ void __iomem *ofs;
+ ofs = entry->mask_base +
entry->msi_attrib.entry_nr * PCI_MSIX_ENTRY_SIZE;
- msg->address_lo = readl(base + PCI_MSIX_ENTRY_LOWER_ADDR_OFFSET);
- msg->address_hi = readl(base + PCI_MSIX_ENTRY_UPPER_ADDR_OFFSET);
- msg->data = readl(base + PCI_MSIX_ENTRY_DATA_OFFSET);
- break;
- }
- default:
+ msg->address_lo = readl(ofs + PCI_MSIX_ENTRY_LOWER_ADDR_OFFSET);
+ msg->address_hi = readl(ofs + PCI_MSIX_ENTRY_UPPER_ADDR_OFFSET);
+ msg->data = readl(ofs + PCI_MSIX_ENTRY_DATA_OFFSET);
+ break;
+ }
+ default:
BUG();
}
}
@@ -230,15 +230,13 @@ void write_msi_msg(unsigned int irq, struct msi_msg *msg)
}
case PCI_CAP_ID_MSIX:
{
- void __iomem *base;
- base = entry->mask_base +
+ void __iomem *ofs;
+ ofs = entry->mask_base +
entry->msi_attrib.entry_nr * PCI_MSIX_ENTRY_SIZE;
- writel(msg->address_lo,
- base + PCI_MSIX_ENTRY_LOWER_ADDR_OFFSET);
- writel(msg->address_hi,
- base + PCI_MSIX_ENTRY_UPPER_ADDR_OFFSET);
- writel(msg->data, base + PCI_MSIX_ENTRY_DATA_OFFSET);
+ writel(msg->address_lo, ofs + PCI_MSIX_ENTRY_LOWER_ADDR_OFFSET);
+ writel(msg->address_hi, ofs + PCI_MSIX_ENTRY_UPPER_ADDR_OFFSET);
+ writel(msg->data, ofs + PCI_MSIX_ENTRY_DATA_OFFSET);
break;
}
default:
@@ -289,7 +287,7 @@ static void attach_msi_entry(struct pci_dev *dev, struct msi_desc *entry)
list_add_tail(&entry->list, &dev->msi_list);
}
-static struct msi_desc* alloc_msi_entry(void)
+static struct msi_desc *alloc_msi_entry(void)
{
struct msi_desc *entry;
@@ -340,8 +338,8 @@ static void __pci_restore_msi_state(struct pci_dev *dev)
static void __pci_restore_msix_state(struct pci_dev *dev)
{
int pos;
- struct msi_desc *entry;
u16 control;
+ struct msi_desc *entry;
if (!dev->msix_enabled)
return;
@@ -386,7 +384,7 @@ static int msi_capability_init(struct pci_dev *dev)
int pos, ret;
u16 control;
- pos = pci_find_capability(dev, PCI_CAP_ID_MSI);
+ pos = pci_find_capability(dev, PCI_CAP_ID_MSI);
/* Ensure msi is disabled as I set it up */
__msi_set_enable(dev, pos, 0);
@@ -455,23 +453,23 @@ static int msix_capability_init(struct pci_dev *dev,
int pos, i, j, nr_entries, ret;
unsigned long phys_addr;
u32 table_offset;
- u16 control;
+ u16 control;
u8 bir;
void __iomem *base;
- pos = pci_find_capability(dev, PCI_CAP_ID_MSIX);
+ pos = pci_find_capability(dev, PCI_CAP_ID_MSIX);
/* Ensure msix is disabled as I set it up */
__msix_set_enable(dev, pos, 0);
/* Request & Map MSI-X table region */
- pci_read_config_word(dev, msi_control_reg(pos), &control);
+ pci_read_config_word(dev, msi_control_reg(pos), &control);
nr_entries = multi_msix_capable(control);
- pci_read_config_dword(dev, msix_table_offset_reg(pos), &table_offset);
+ pci_read_config_dword(dev, msix_table_offset_reg(pos), &table_offset);
bir = (u8)(table_offset & PCI_MSIX_FLAGS_BIRMASK);
table_offset &= ~PCI_MSIX_FLAGS_BIRMASK;
- phys_addr = pci_resource_start (dev, bir) + table_offset;
+ phys_addr = pci_resource_start(dev, bir) + table_offset;
base = ioremap_nocache(phys_addr, nr_entries * PCI_MSIX_ENTRY_SIZE);
if (base == NULL)
return -ENOMEM;
@@ -482,7 +480,7 @@ static int msix_capability_init(struct pci_dev *dev,
if (!entry)
break;
- j = entries[i].entry;
+ j = entries[i].entry;
entry->msi_attrib.type = PCI_CAP_ID_MSIX;
entry->msi_attrib.is_64 = 1;
entry->msi_attrib.entry_nr = j;
@@ -500,9 +498,8 @@ static int msix_capability_init(struct pci_dev *dev,
if (ret) {
int avail = 0;
list_for_each_entry(entry, &dev->msi_list, list) {
- if (entry->irq != 0) {
+ if (entry->irq != 0)
avail++;
- }
}
free_msi_entries(dev);
@@ -540,7 +537,7 @@ static int msix_capability_init(struct pci_dev *dev,
* to determine if MSI/-X are supported for the device. If MSI/-X is
* supported return 0, else return an error code.
**/
-static int pci_msi_check_device(struct pci_dev* dev, int nvec, int type)
+static int pci_msi_check_device(struct pci_dev *dev, int nvec, int type)
{
struct pci_bus *bus;
int ret;
@@ -587,7 +584,7 @@ static int pci_msi_check_device(struct pci_dev* dev, int nvec, int type)
* indicates the successful setup of an entry zero with the new MSI
* irq or non-zero for otherwise.
**/
-int pci_enable_msi(struct pci_dev* dev)
+int pci_enable_msi(struct pci_dev *dev)
{
int status;
@@ -609,7 +606,7 @@ int pci_enable_msi(struct pci_dev* dev)
}
EXPORT_SYMBOL(pci_enable_msi);
-void pci_msi_shutdown(struct pci_dev* dev)
+void pci_msi_shutdown(struct pci_dev *dev)
{
struct msi_desc *entry;
@@ -631,13 +628,13 @@ void pci_msi_shutdown(struct pci_dev* dev)
/* Restore dev->irq to its default pin-assertion irq */
dev->irq = entry->msi_attrib.default_irq;
}
-void pci_disable_msi(struct pci_dev* dev)
+
+void pci_disable_msi(struct pci_dev *dev)
{
if (!pci_msi_enable || !dev || !dev->msi_enabled)
return;
pci_msi_shutdown(dev);
-
free_msi_entries(dev);
}
EXPORT_SYMBOL(pci_disable_msi);
@@ -657,14 +654,14 @@ EXPORT_SYMBOL(pci_disable_msi);
* of irqs available. Driver should use the returned value to re-send
* its request.
**/
-int pci_enable_msix(struct pci_dev* dev, struct msix_entry *entries, int nvec)
+int pci_enable_msix(struct pci_dev *dev, struct msix_entry *entries, int nvec)
{
int status, pos, nr_entries;
int i, j;
u16 control;
if (!entries)
- return -EINVAL;
+ return -EINVAL;
status = pci_msi_check_device(dev, nvec, PCI_CAP_ID_MSIX);
if (status)
@@ -688,7 +685,7 @@ int pci_enable_msix(struct pci_dev* dev, struct msix_entry *entries, int nvec)
WARN_ON(!!dev->msix_enabled);
/* Check whether driver already requested for MSI irq */
- if (dev->msi_enabled) {
+ if (dev->msi_enabled) {
printk(KERN_INFO "PCI: %s: Can't enable MSI-X. "
"Device already has an MSI irq assigned\n",
pci_name(dev));
@@ -699,7 +696,7 @@ int pci_enable_msix(struct pci_dev* dev, struct msix_entry *entries, int nvec)
}
EXPORT_SYMBOL(pci_enable_msix);
-void pci_msix_shutdown(struct pci_dev* dev)
+void pci_msix_shutdown(struct pci_dev *dev)
{
if (!pci_msi_enable || !dev || !dev->msix_enabled)
return;
@@ -708,13 +705,13 @@ void pci_msix_shutdown(struct pci_dev* dev)
pci_intx_for_msi(dev, 1);
dev->msix_enabled = 0;
}
-void pci_disable_msix(struct pci_dev* dev)
+
+void pci_disable_msix(struct pci_dev *dev)
{
if (!pci_msi_enable || !dev || !dev->msix_enabled)
return;
pci_msix_shutdown(dev);
-
free_msi_entries(dev);
}
EXPORT_SYMBOL(pci_disable_msix);
@@ -728,10 +725,10 @@ EXPORT_SYMBOL(pci_disable_msix);
* allocated for this device function, are reclaimed to unused state,
* which may be used later on.
**/
-void msi_remove_pci_irq_vectors(struct pci_dev* dev)
+void msi_remove_pci_irq_vectors(struct pci_dev *dev)
{
if (!pci_msi_enable || !dev)
- return;
+ return;
if (dev->msi_enabled || dev->msix_enabled)
free_msi_entries(dev);
diff --git a/drivers/pci/msi.h b/drivers/pci/msi.h
index 6a67980..4b33da6 100644
--- a/drivers/pci/msi.h
+++ b/drivers/pci/msi.h
@@ -16,9 +16,9 @@
#define msi_lower_address_reg(base) (base + PCI_MSI_ADDRESS_LO)
#define msi_upper_address_reg(base) (base + PCI_MSI_ADDRESS_HI)
#define msi_data_reg(base, is64bit) \
- ( (is64bit == 1) ? base+PCI_MSI_DATA_64 : base+PCI_MSI_DATA_32 )
+ ((is64bit == 1) ? base+PCI_MSI_DATA_64 : base+PCI_MSI_DATA_32)
#define msi_mask_bits_reg(base, is64bit) \
- ( (is64bit == 1) ? base+PCI_MSI_MASK_BIT : base+PCI_MSI_MASK_BIT-4)
+ ((is64bit == 1) ? base+PCI_MSI_MASK_BIT : base+PCI_MSI_MASK_BIT-4)
#define multi_msi_capable(control) (control & PCI_MSI_FLAGS_QMASK)
#define is_64bit_address(control) (!!(control & PCI_MSI_FLAGS_64BIT))
#define is_mask_bit_support(control) (!!(control & PCI_MSI_FLAGS_MASKBIT))
--
--
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