On 2/15/24 02:27, David Laight wrote:
...
It would be worthwhile tracking this down since there are
lots of unaligned data accesses (8-byte accesses on 4-byte aligned addresses)
when running the kernel in 64-bit mode.
Hmmm....
For performance reasons you really don't want any of them.
The misaligned 64bit fields need an __attribute((aligned(4)) marker.
If the checksum code can do them it really needs to detect
and handle the misalignment.
The misaligned trap handler probably ought to contain a
warn_on_once() to dump stack on the first such error.
They can then be fixed one at a time.
Unaligned LDD at unwind_once+0x4a8/0x5e0
Decoded:
Unaligned LDD at unwind_once (arch/parisc/kernel/unwind.c:212 arch/parisc/kernel/unwind.c:243 arch/parisc/kernel/unwind.c:371 arch/parisc/kernel/unwind.c:445)
Source:
static bool pc_is_kernel_fn(unsigned long pc, void *fn)
{
return (unsigned long)dereference_kernel_function_descriptor(fn) == pc;
}
Disassembled:
c38: 50 3c 00 00 ldd 0(r1),ret0
c3c: 08 1b 02 44 copy dp,r4
c40: 0f 80 10 da ldd 0(ret0),r26 <--
c44: 37 dd 3f a1 ldo -30(sp),ret1
c48: 51 02 00 20 ldd 10(r8),rp
c4c: e8 40 f0 00 bve,l (rp),rp
c50: 51 1b 00 30 ldd 18(r8),dp
Hmm, interesting. See below for a possible fix. Should I submit a patch ?
Thanks,
Guenter
---
diff --git a/arch/parisc/kernel/entry.S b/arch/parisc/kernel/entry.S
index ab23e61a6f01..1d2aab619466 100644
--- a/arch/parisc/kernel/entry.S
+++ b/arch/parisc/kernel/entry.S
@@ -772,6 +772,7 @@ ENTRY_CFI(_switch_to)
bv %r0(%r2)
mtctl %r25,%cr30
+ .align 8
ENTRY(_switch_to_ret)
mtctl %r0, %cr0 /* Needed for single stepping */
callee_rest
@@ -1702,6 +1703,7 @@ ENTRY_CFI(sys_rt_sigreturn_wrapper)
LDREG PT_GR28(%r1),%r28 /* reload original r28 for syscall_exit */
ENDPROC_CFI(sys_rt_sigreturn_wrapper)
+ .align 8
ENTRY(syscall_exit)
/* NOTE: Not all syscalls exit this way. rt_sigreturn will exit
* via syscall_exit_rfi if the signal was received while the process
