Re: [PATCH RFC] more progress with radeon on C8000

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On 5/17/23 21:59, John David Anglin wrote:
On 2023-05-16 4:48 p.m., Helge Deller wrote:
* Helge Deller<deller@xxxxxx>:
There have been various approaches to fix the radeon graphic cards
on C8000 workstations, e.g. this is the last thread:
https://marc.info/?l=linux-parisc&m=156971832128700&w=2

With the patch below the radeon ring and ib tests don't fail any longer.
It uses (relatively) lightweight pdc/fdc instructions.

The patch below
- uses the pdc instruction (purge data cache) before reading back the
   ring test result from memory.
- modifies the parisc-agp code, based on Thomas patch

The patch is not intended to by applied as-is.
attached is a cleaned up version of the patch.
I tried this change on c8000 with kernel 6.3.3:

[   89.531274] drm_kms_helper alternatives: applied 0 out of 27 patches
[   89.630885] ipmi_si alternatives: applied 0 out of 8 patches
[   89.731041] ipmi_si: IPMI System Interface driver
[   89.821872] drm_display_helper alternatives: applied 0 out of 6 patches
[   89.833885] ipmi_si: Adding device-tree-specified kcs state machine
[   89.971367] ipmi_si: Trying device-tree-specified kcs state machine at mem address 0xfffffff0f05b0000, slave address 0x0, irq 0
[   90.271358] ttm alternatives: applied 0 out of 13 patches
[   90.421083] drm_ttm_helper alternatives: applied 0 out of 2 patches
[   90.881506] radeon alternatives: applied 0 out of 4803 patches
[   90.980838] [drm] radeon kernel modesetting enabled.
[   91.041955] [drm] initializing kernel modesetting (RV350 0x1002:0x4154 0x1002:0x0002 0x80).
[   91.140773] [drm] Forcing AGP to PCI mode
[   91.290915] [drm] GPU not posted. posting now...
[   91.551801] [drm] Generation 2 PCI interface, using max accessible memory
[   91.620801] radeon 0000:80:00.0: VRAM: 128M 0xFFFFFFFFC0000000 - 0xFFFFFFFFC7FFFFFF (128M used)
[   91.671141] ipmi 16: IPMI message handler: Found new BMC (man_id: 0x00000b, prod_id: 0x8201, dev_id: 0x32)
[   91.710747] radeon 0000:80:00.0: GTT: 512M 0xFFFFFFFFA0000000 - 0xFFFFFFFFBFFFFFFF
[   91.814064] ipmi 16: IPMI kcs interface initialized
[   91.880842] [drm] Detected VRAM RAM=128M, BAR=128M
[   91.970765] [drm] RAM width 128bits DDR
[   91.971192] [drm] radeon: 128M of VRAM memory ready
[   92.050830] [drm] radeon: 512M of GTT memory ready.
[   92.110946] [drm] GART: num cpu pages 131072, num gpu pages 131072
[   92.222903] [drm] radeon: 1 quad pipes, 1 Z pipes initialized
[   92.290747] [drm] PCI GART of 512M enabled (table at 0x0000000047040000).
[   92.370907] radeon 0000:80:00.0: WB enabled
[   92.431273] radeon 0000:80:00.0: fence driver on ring 0 use gpu addr 0xffffffffa0000000
[   92.531273] [drm] radeon: irq initialized.
[   92.560906] [drm] Loading R300 Microcode
[   92.631141] radeon 0000:80:00.0: Direct firmware load for radeon/R300_cp.bin failed with error -2
[   92.743052] radeon_cp: Failed to load firmware "radeon/R300_cp.bin"
[   92.819159] [drm:r100_cp_init [radeon]] *ERROR* Failed to load firmware!
[   92.890738] radeon 0000:80:00.0: failed initializing CP (-2).
[   92.960765] radeon 0000:80:00.0: Disabling GPU acceleration
[   93.030744] [drm] radeon: cp finalized
[   93.142149] [drm] Radeon Display Connectors
[   93.170762] [drm] Connector 0:
[   93.170771] [drm]   VGA-1
[   93.170775] [drm]   DDC: 0x60 0x60 0x60 0x60 0x60 0x60 0x60 0x60
[   93.170786] [drm]   Encoders:
[   93.290760] [drm]     CRT1: INTERNAL_DAC1
[   93.340770] [drm] Connector 1:
[   93.380749] [drm]   DVI-I-1
[   93.410745] [drm]   HPD1
[   93.440846] [drm]   DDC: 0x64 0x64 0x64 0x64 0x64 0x64 0x64 0x64
[   93.520737] [drm]   Encoders:
[   93.559678] [drm]     CRT2: INTERNAL_DAC2
[   93.590733] [drm]     DFP1: INTERNAL_TMDS1
[   93.853779] [drm] fb mappable at 0xFFFFFFFFC0040000
[   93.900758] [drm] vram apper at 0xFFFFFFFFC0000000
[   93.940732] [drm] size 5242880
[   93.960731] [drm] fb depth is 24
[   93.981757] [drm]    pitch is 5120
[   94.080657] Console: switching to colour frame buffer device 160x64
[   94.290810] radeon 0000:80:00.0: [drm] fb0: radeondrmfb frame buffer device
[   94.420892] [drm] Initialized radeon 2.50.0 20080528 for 0000:80:00.0 on minor 0

80:00.0 VGA compatible controller: Advanced Micro Devices, Inc. [AMD/ATI] RV350 GL [FireGL T2] (rev 80) (prog-if 00 [VGA controller])
         Subsystem: Advanced Micro Devices, Inc. [AMD/ATI] RV350 GL [FireGL T2]
         Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR+ FastB2B- DisINTx-
         Status: Cap+ 66MHz+ UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
         Latency: 192 (2000ns min), Cache Line Size: 128 bytes
         Interrupt: pin A routed to IRQ 75
         Region 0: Memory at ffffffffc0000000 (32-bit, prefetchable) [size=128M]
         Region 1: I/O ports at 3c000 [size=256]
         Region 2: Memory at ffffffffc8020000 (32-bit, non-prefetchable) [size=64K]
         Expansion ROM at ffffffffc8000000 [disabled] [size=128K]
         Capabilities: <access denied>
         Kernel driver in use: radeon
         Kernel modules: radeon

Firmware still fails to load

You need to install the debian firware package:
apt install firmware-linux-nonfree firmware-linux-free

and acceleration is disabled.

Yes, if firware isn't loaded the acceleration will be disabled too.
But even with firmware loaded the ring tests will fail on AGP cards.


Maybe this is also a cache flush issue?

Probably.
Interestingly the radeon driver doesn't use the parisc-agp driver,
but it's internal GART. Since it works with radeon-PCI cards,
maybe it's not useable on parisc and we would need the parisc-agp
driver.

FB console looks okay.

This is a significant advance 😁

Not really :-(
The unaccelerated FB console comes up even without my patch.
The latest patch I sent also missed the hunk below.
With that ugly patch, my radeon *PCI* (not AGP) card seems to work.
Additionally it's unclear how to cope with user-mapped memory.

Helge

@@ -3689,6 +3690,16 @@ void r100_ring_ib_execute(struct radeon_device *rdev, struct radeon_ib *ib)
 {
 	struct radeon_ring *ring = &rdev->ring[RADEON_RING_TYPE_GFX_INDEX];

+	u32 *ptr;
+	int len;
+	ptr = ib->ptr;
+	len = ib->length_dw;
+	while (len >= 0) {
+		asm_io_fdc(ptr);
+		ptr++;
+		len--;
+	}
+
 	if (ring->rptr_save_reg) {
 		u32 next_rptr = ring->wptr + 2 + 3;
 		radeon_ring_write(ring, PACKET0(ring->rptr_save_reg, 0));





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