On 2022-09-25 4:00 p.m., Helge Deller wrote:
It only supports the PA 1.1 instruction set. PA8x00 CPUs always
support the PA 2.0 instruction set even when running in 32-bit mode.
The 32-bit kernel is built with the 32-bit compiler.
As far as I understand arch/parisc/Makefile, choosing the CPU type
just enables *tuning* for the selected CPU. See Makefile:
# select which processor to optimise for
cflags-$(CONFIG_PA7000) += -march=1.1 -mschedule=7100
cflags-$(CONFIG_PA7200) += -march=1.1 -mschedule=7200
cflags-$(CONFIG_PA7100LC) += -march=1.1 -mschedule=7100LC
cflags-$(CONFIG_PA7300LC) += -march=1.1 -mschedule=7300
cflags-$(CONFIG_PA8X00) += -march=2.0 -mschedule=8000
The only assembler instructions which break qemu are our manually
added ones: "pdtlb,l" and "ldd" (for flushing - see my first patch).
The two patches I sent today allows to boot such a kernel, and
they still keep the PA2.0 support when run on PA2.0 machines.
I think that patch is fine. Probably the same needs to be done the use of "pdtlb,l"
instruction in the tmpalias flushes.
We used to have locking to serialize the TLB purges in the tmpalias flushes when
we used the pdtlb flush.
It's true the 32-bit compiler doesn't generate much that's not PA 1.1 compatible when
-march=2.0 is specified. At on time, there was some push to allow 64-bit register use
in the 32-bit runtime. Some hpux systems preserve the full 64-bits in context switches, etc.
So, one can get away with using 64-bit operations as long as one doesn't try to perserve
values across calls.
I believe "ldd" for prefetch works both in 32 and 64-bit PA 2.0 environments.
Dave
--
John David Anglin dave.anglin@xxxxxxxx
