The parisc was using some readq/writeq accessors without special
considerations as to what will happen on 32bit CPUs if you do
this. Maybe we have been lucky that it "just worked" on 32bit
due to the compiler behaviour, or the code paths were never
executed.
Fix the two offending code sites like this:
arch/parisc/lib/iomap.c:
- Put ifdefs around the 64bit accessors and make sure
that ioread64, ioread64be, iowrite64 and iowrite64be
are not available on 32bit builds.
- Also fold in a bug fix where 64bit access was by
mistake using 32bit writel() accessors rather
than 64bit writeq().
drivers/parisc/sba_iommu.c:
- Access any 64bit registers using _lo_hi-semantics by way
of the readq and writeq operations provided by
<linux/io-64-nonatomic-lo-hi.h>
Cc: James E.J. Bottomley <James.Bottomley@xxxxxxxxxxxxxxxxxxxxx>
Cc: Helge Deller <deller@xxxxxx>
Cc: linux-parisc@xxxxxxxxxxxxxxx
Cc: linux-arch@xxxxxxxxxxxxxxx
Cc: Arnd Bergmann <arnd@xxxxxxxx>
Cc: John David Anglin <dave.anglin@xxxxxxxx>
Signed-off-by: Linus Walleij <linus.walleij@xxxxxxxxxx>
---
ChangeLog v3->v4:
- Drop the explicit use of io[read|write]64_lo_hi() and just
use readq/writeq provided from the include.
- Move and reword comment in the sba_iommu driver.
ChangeLog v0->v3:
- New patch fixing the use of IO accessors
- If the parisc people have no strong preference maybe Arnd
can merge this through the arch tree with patch 2/2.
---
arch/parisc/lib/iomap.c | 24 ++++++++++++++++++++++--
drivers/parisc/sba_iommu.c | 6 ++++++
2 files changed, 28 insertions(+), 2 deletions(-)
diff --git a/arch/parisc/lib/iomap.c b/arch/parisc/lib/iomap.c
index 860385058085..d3d57119df64 100644
--- a/arch/parisc/lib/iomap.c
+++ b/arch/parisc/lib/iomap.c
@@ -48,15 +48,19 @@ struct iomap_ops {
unsigned int (*read16be)(const void __iomem *);
unsigned int (*read32)(const void __iomem *);
unsigned int (*read32be)(const void __iomem *);
+#ifdef CONFIG_64BIT
u64 (*read64)(const void __iomem *);
u64 (*read64be)(const void __iomem *);
+#endif
void (*write8)(u8, void __iomem *);
void (*write16)(u16, void __iomem *);
void (*write16be)(u16, void __iomem *);
void (*write32)(u32, void __iomem *);
void (*write32be)(u32, void __iomem *);
+#ifdef CONFIG_64BIT
void (*write64)(u64, void __iomem *);
void (*write64be)(u64, void __iomem *);
+#endif
void (*read8r)(const void __iomem *, void *, unsigned long);
void (*read16r)(const void __iomem *, void *, unsigned long);
void (*read32r)(const void __iomem *, void *, unsigned long);
@@ -175,6 +179,7 @@ static unsigned int iomem_read32be(const void __iomem *addr)
return __raw_readl(addr);
}
+#ifdef CONFIG_64BIT
static u64 iomem_read64(const void __iomem *addr)
{
return readq(addr);
@@ -184,6 +189,7 @@ static u64 iomem_read64be(const void __iomem *addr)
{
return __raw_readq(addr);
}
+#endif
static void iomem_write8(u8 datum, void __iomem *addr)
{
@@ -210,15 +216,17 @@ static void iomem_write32be(u32 datum, void __iomem *addr)
__raw_writel(datum, addr);
}
+#ifdef CONFIG_64BIT
static void iomem_write64(u64 datum, void __iomem *addr)
{
- writel(datum, addr);
+ writeq(datum, addr);
}
static void iomem_write64be(u64 datum, void __iomem *addr)
{
- __raw_writel(datum, addr);
+ __raw_writeq(datum, addr);
}
+#endif
static void iomem_read8r(const void __iomem *addr, void *dst, unsigned long count)
{
@@ -274,15 +282,19 @@ static const struct iomap_ops iomem_ops = {
.read16be = iomem_read16be,
.read32 = iomem_read32,
.read32be = iomem_read32be,
+#ifdef CONFIG_64BIT
.read64 = iomem_read64,
.read64be = iomem_read64be,
+#endif
.write8 = iomem_write8,
.write16 = iomem_write16,
.write16be = iomem_write16be,
.write32 = iomem_write32,
.write32be = iomem_write32be,
+#ifdef CONFIG_64BIT
.write64 = iomem_write64,
.write64be = iomem_write64be,
+#endif
.read8r = iomem_read8r,
.read16r = iomem_read16r,
.read32r = iomem_read32r,
@@ -332,6 +344,7 @@ unsigned int ioread32be(const void __iomem *addr)
return *((u32 *)addr);
}
+#ifdef CONFIG_64BIT
u64 ioread64(const void __iomem *addr)
{
if (unlikely(INDIRECT_ADDR(addr)))
@@ -345,6 +358,7 @@ u64 ioread64be(const void __iomem *addr)
return iomap_ops[ADDR_TO_REGION(addr)]->read64be(addr);
return *((u64 *)addr);
}
+#endif
u64 ioread64_lo_hi(const void __iomem *addr)
{
@@ -411,6 +425,7 @@ void iowrite32be(u32 datum, void __iomem *addr)
}
}
+#ifdef CONFIG_64BIT
void iowrite64(u64 datum, void __iomem *addr)
{
if (unlikely(INDIRECT_ADDR(addr))) {
@@ -428,6 +443,7 @@ void iowrite64be(u64 datum, void __iomem *addr)
*((u64 *)addr) = datum;
}
}
+#endif
void iowrite64_lo_hi(u64 val, void __iomem *addr)
{
@@ -544,8 +560,10 @@ EXPORT_SYMBOL(ioread16);
EXPORT_SYMBOL(ioread16be);
EXPORT_SYMBOL(ioread32);
EXPORT_SYMBOL(ioread32be);
+#ifdef CONFIG_64BIT
EXPORT_SYMBOL(ioread64);
EXPORT_SYMBOL(ioread64be);
+#endif
EXPORT_SYMBOL(ioread64_lo_hi);
EXPORT_SYMBOL(ioread64_hi_lo);
EXPORT_SYMBOL(iowrite8);
@@ -553,8 +571,10 @@ EXPORT_SYMBOL(iowrite16);
EXPORT_SYMBOL(iowrite16be);
EXPORT_SYMBOL(iowrite32);
EXPORT_SYMBOL(iowrite32be);
+#ifdef CONFIG_64BIT
EXPORT_SYMBOL(iowrite64);
EXPORT_SYMBOL(iowrite64be);
+#endif
EXPORT_SYMBOL(iowrite64_lo_hi);
EXPORT_SYMBOL(iowrite64_hi_lo);
EXPORT_SYMBOL(ioread8_rep);
diff --git a/drivers/parisc/sba_iommu.c b/drivers/parisc/sba_iommu.c
index 374b9199878d..ecd870087a3d 100644
--- a/drivers/parisc/sba_iommu.c
+++ b/drivers/parisc/sba_iommu.c
@@ -28,6 +28,12 @@
#include <linux/dma-map-ops.h>
#include <linux/scatterlist.h>
#include <linux/iommu-helper.h>
+/*
+ * The semantics of 64 register access on 32bit systems can't be guaranteed
+ * by the C standard, we hope the _lo_hi() macros defining readq and writeq
+ * here will behave as expected.
+ */
+#include <linux/io-64-nonatomic-lo-hi.h>
#include <asm/byteorder.h>
#include <asm/io.h>
--
2.37.2
