On 2019-05-27 4:11 p.m., Helge Deller wrote: > On 27.05.19 21:41, John David Anglin wrote: >> On 2019-05-27 3:20 p.m., Helge Deller wrote: >>> This fixes the HPMC crashes on a C240 and C36XX machines. For other >>> machines we rely on the firmware to set the bit when needed. >>> >>> In case one finds HPMC issues, people could try to boot their machines >>> with the "no-alternatives" kernel option to turn off any alternative >>> patching. >> Just wondering about soft fail versus hard fail. In lba_pci.c, we have soft fail by default: >> >> #if defined(ENABLE_HARDFAIL) >> WRITE_REG32(stat | HF_ENABLE, d->hba.base_addr + LBA_STAT_CTL); >> #else >> WRITE_REG32(stat & ~HF_ENABLE, d->hba.base_addr + LBA_STAT_CTL); >> #endif >> >> However, in sba_iommu.c, we crash on rope errors: >> >> /* >> ** Make sure the box crashes on rope errors. >> */ >> WRITE_REG(HF_ENABLE, ioc_hpa + ROPE0_CTL + j); >> >> I suspect Carlo's C3600 HPMC issues must be from rope issue.> Should rope errors be soft as well? > Don't know, but seems logical. > If so, does it then makes sense to a kernel parameter (e.g. "hardfail") too ? Carlo said that c3600 hpmc'd with sba_iommu.c patched to soft fail. Maybe pdc overrides? Anyway, I don't think it's important. -- John David Anglin dave.anglin@xxxxxxxx
