Re: [PATCH] parisc: use per-pagetable spinlock

[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]

 




On Sat, 6 Apr 2019, James Bottomley wrote:

> On Sat, 2019-04-06 at 16:13 -0400, Mikulas Patocka wrote:
> > 
> > > Of course, on systems without a merced bus, we don't need the lock
> > at 
> > > all, so runtime patching might be usable to fix that case.
> > > 
> > > James
> > 
> > The lock is still needed to synchronize TLB fault handlers with the
> > code that modifies the pagetables - but we could have per-process
> > lock for this purpose.
> 
> It is?  I don't think we need any per-arch sync for that.  The purge
> should happen after all modifications are done so the next page fault
> inserts the new TLB entry ... so if there is a place where the purge
> lock matters to the page table updates, we're doing something wrong.
> 
> James

Suppose that this sequence happens:

CPU1:
(inside the TLB miss handler)
read the value XXX from the pagetables to the register

CPU2:
modify the value in the pagetables to YYY
broadcast a TLB purge

CPU1:
receives the TLB purge broadcast and flushes the TLB
... continues executing the TLB handler and inserts the value XXX from the register into the TLB

And now, CPU1 is running with stale entry in the TLB. We need the lock to 
prevent this situation.

Mikulas



[Index of Archives]     [Linux SoC]     [Linux USB Devel]     [Video for Linux]     [Linux Audio Users]     [Yosemite News]     [Linux Kernel]     [Linux SCSI]

  Powered by Linux