On parisc, each IRQ can only be handled by one CPU, and currently CPU0 is choosen as default for handling all IRQs by default. With this patch we now assign each requested IRQ to one of the online CPUs (and thus distribute the IRQs across all CPUs), even without an instance of irqbalance running. Signed-off-by: Helge Deller <deller@xxxxxx> diff --git a/arch/parisc/kernel/irq.c b/arch/parisc/kernel/irq.c index fd6d873..04e8755 100644 --- a/arch/parisc/kernel/irq.c +++ b/arch/parisc/kernel/irq.c @@ -117,7 +117,10 @@ int cpu_check_affinity(struct irq_data *d, const struct cpumask *dest) return -EINVAL; /* whatever mask they set, we just allow one CPU */ - cpu_dest = cpumask_first_and(dest, cpu_online_mask); + cpu_dest = cpumask_next_and(d->irq & (num_online_cpus()-1), + dest, cpu_online_mask); + if (cpu_dest >= nr_cpu_ids) + cpu_dest = cpumask_first_and(dest, cpu_online_mask); return cpu_dest; }
