Re: [RFC][PATCH] parisc: Fix left-shift assembly to be PA1.1 compatible

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* John David Anglin <dave.anglin@xxxxxxxx>:
> On 2018-10-19 2:26 AM, Helge Deller wrote:
> > If it's bogus we could replace in entry.S:
> > 
> > --- a/arch/parisc/kernel/entry.S
> > +++ b/arch/parisc/kernel/entry.S
> > @@ -426,8 +426,7 @@
> >          ldw,s           \index(\pmd),\pmd
> >          bb,>=,n         \pmd,_PxD_PRESENT_BIT,\fault
> >          dep             %r0,31,PxD_FLAG_SHIFT,\pmd /* clear flags */
> > -       copy            \pmd,%r9
> > -       SHLREG          %r9,PxD_VALUE_SHIFT,\pmd
> > +       SHLREG          \pmd,PxD_VALUE_SHIFT,\pmd
> I hadn't realized this macro was using r9 (t1).  Generally, I passed the
> temporary registers used by a
> macro in the argument list so it was clear what registers were being used.
> 
> I believe the copy is unnecessary.
> 
> I believe the shl macro can be removed.  It is same as shlw assemble
> mnemonic.

I think the patch below is the best solution.
Signed-off-by: Helge Deller <deller@xxxxxx>


diff --git a/arch/parisc/include/asm/assembly.h b/arch/parisc/include/asm/assembly.h
index e9c6385ef0d1..32b407dc3c86 100644
--- a/arch/parisc/include/asm/assembly.h
+++ b/arch/parisc/include/asm/assembly.h
@@ -129,15 +129,18 @@
 	.macro	debug value
 	.endm
 
-
-	/* Shift Left - note the r and t can NOT be the same! */
-	.macro shl r, sa, t
-	dep,z	\r, 31-(\sa), 32-(\sa), \t
-	.endm
-
-	/* The PA 2.0 shift left */
 	.macro shlw r, sa, t
+#if defined(CONFIG_PA20)
+	/* The PA 2.0 shift left (shlw) */
 	depw,z	\r, 31-(\sa), 32-(\sa), \t
+#elif defined(CONFIG_PA11)
+	/* The PA 1.1 shift left (zdep) */
+	zdep	\r, 31-(\sa), 32-(\sa), \t
+#else
+	#warning "Revisit shlw callers to support PA1.0"
+	/* PA 1.0: Note the r and t can NOT be the same! */
+	dep,z   \r, 31-(\sa), 32-(\sa), \t
+#endif
 	.endm
 
 	/* And the PA 2.0W shift left */
diff --git a/arch/parisc/kernel/entry.S b/arch/parisc/kernel/entry.S
index 242c5ab65611..0b3a8fc7a9ff 100644
--- a/arch/parisc/kernel/entry.S
+++ b/arch/parisc/kernel/entry.S
@@ -426,8 +426,7 @@
 	ldw,s		\index(\pmd),\pmd
 	bb,>=,n		\pmd,_PxD_PRESENT_BIT,\fault
 	dep		%r0,31,PxD_FLAG_SHIFT,\pmd /* clear flags */
-	copy		\pmd,%r9
-	SHLREG		%r9,PxD_VALUE_SHIFT,\pmd
+	SHLREG		\pmd,PxD_VALUE_SHIFT,\pmd
 	extru		\va,31-PAGE_SHIFT,ASM_BITS_PER_PTE,\index
 	dep		%r0,31,PAGE_SHIFT,\pmd  /* clear offset */
 	shladd		\index,BITS_PER_PTE_ENTRY,\pmd,\pmd /* pmd is now pte */



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