On 2017-08-08 11:48 AM, Helge Deller wrote:
I know, but the get a MACH64 card up to sync in a B2600, with a small
change in aty driver. And the change is because Astro/Elroy behave incorrect
in respect to PCI standards, IMHO. It looks like it colapses multiple PCI
mem accesses into one access.
Yes, I think that's true.
aty_st_8(CLOCK_CNTL_ADDR, ((offset << 2) & PLL_ADDR) | PLL_WR_EN, par);
/* write the register value */
aty_st_8(CLOCK_CNTL_DATA, val & PLL_DATA, par);
aty_st_8(CLOCK_CNTL_ADDR, ((offset << 2) & PLL_ADDR) & ~PLL_WR_EN, par);
B2600 HPMCs in this code sequence, probably because the two accesses
to CNTL_ADDR end up in just the last access. Placing in aty_ld_8 after
the first aty_st_8 avoids the problem.
There are quite some comments in drivers/parisc/lba_pci.c regarding this.
Esp. the comment about "Directed" ranges at line 1258 might be interesting
regarding graphic cards.
It says:
/************************************
* LBA register read and write support
*
* BE WARNED: register writes are posted.
* (ie follow writes which must reach HW with a read)
*/
It seems that aty stores likely need a following read when writes are
posted. I would hack
drivers/video/fbdev/aty/aty128fb.c as a test.
Dave
--
John David Anglin dave.anglin@xxxxxxxx
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