On 2015-09-27, at 12:17 PM, James Bottomley wrote: > What makes you think we need SMP_CACHE_BYTES to be different from > L1_CACHE_BYTES? No other architecture does this. The theory that gives > us two defines was that some SMP systems would arbitrate for memory at > geater than cache line offsets but, in practise, none does because > that's the level at which the cross CPU memory ownership model works > anyway. I was just keeping the values we had before. Changing to the new L1_CACHE_BYTES value probably needs testing. Dave -- John David Anglin dave.anglin@xxxxxxxx -- To unsubscribe from this list: send the line "unsubscribe linux-parisc" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
