> >> I think the way to avoid this in the kernel is to stick a "nop" in > >> the memory barrier. =A0That will avoid a zero length asm and branching > >> into the delay slot. This adds about 17000 odd nops ;( > > A further reason is GCC does not know the length of asm insns. =A0So, > > using a zero length asm on parisc is asking for trouble. > > The problem is that many applications (including glibc IIRC) expect a > zero length asm volatile to work correctly. Althought it's asking for > trouble, I think it's one of these expected things that just has to > work :-) Most targets don't have to deal with delay branch sequences and the fact that the hardware can't deal with a branch to the delay slot. As I have learned this morning, the length calculated for asms is just an estimate. It can be confused by comments, etc. So, gcc is going to have to add a nop when it finds an asm after a branch because the size estimate is unreliable. I had tried to fix this before but missed the asm_operands case. The branch type selection (useskip) also needs to check for asms ;( Dave -- J. David Anglin dave.anglin@xxxxxxxxxxxxxx National Research Council of Canada (613) 990-0752 (FAX: 952-6602) -- To unsubscribe from this list: send the line "unsubscribe linux-parisc" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
