On Sun, Dec 12, 2010 at 7:03 PM, John David Anglin
<dave@xxxxxxxxxxxxxxxxxx> wrote:
>> > (insn:TI 15 14 16 (parallel [
>> > (asm_operands/v ("") ("") 0 []
>> > []
>> > [] mm/swap_state.c:185)
>> > (clobber (mem:BLK (scratch) [0 A8]))
>> > ]) include/linux/page-flags.h:298 -1
>> > (nil))
>>
>> I think the way to avoid this in the kernel is to stick a "nop" in
>> the memory barrier. That will avoid a zero length asm and branching
>> into the delay slot.
>
> A further reason is GCC does not know the length of asm insns. So,
> using a zero length asm on parisc is asking for trouble.
The problem is that many applications (including glibc IIRC) expect a
zero length asm volatile to work correctly. Althought it's asking for
trouble, I think it's one of these expected things that just has to
work :-)
Cheers,
Carlos.
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