On Sun, 11 Apr 2010, James Bottomley wrote: > On Sun, 2010-04-11 at 13:12 -0400, John David Anglin wrote: > > On Fri, 09 Apr 2010, Carlos O'Donell wrote: > > > > > We need to start splitting up your giant "stability" patch into > > > manageable chunks. > > > > Here's the fourth chunk. Am I being paranoid? > > Could you explain what difference you think it makes ... because I can't > really see one. > > All the patch seems to be doing is setting r1 to the stack pointer with > interrupts enabled and then copying the value with interrupts disabled, > which is fine, but I don't see how it's different from setting r30 > directly from the task entry within the interrupt disabled region. If it is possible for an interruption such as a data TLB miss to occur in the instruction that loads the stack pointer, then the period while interrupts are disabled will be extended while the TLB miss is handled. So, placing the load outside the critical region keeps the period where interrupts are disabled as short as possible. It may not be a big deal here but in time critical code issues like this are important. Dave -- J. David Anglin dave.anglin@xxxxxxxxxxxxxx National Research Council of Canada (613) 990-0752 (FAX: 952-6602) -- To unsubscribe from this list: send the line "unsubscribe linux-parisc" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
