On 10/06/2013 05:41 PM, Russell King - ARM Linux wrote: > On Sun, Oct 06, 2013 at 05:30:47PM -0500, Joel Fernandes wrote: >> On receiving IRQ exception in SVC mode, all the SVC mode registers are saved >> onto the stack very early on. >> >> The stack frame allocation code for IRQ entry during SVC mode (svc_entry) is >> hard to read as 4-less is allocated initially only to be allocated later >> implicity using the mov r3, [sp, #-4]! instruction. We make code easier to read >> by allocating the 4 bytes on the stack frame in the beginning itself and remove >> all instances where 4 bytes is adjusted. > > You omit to say that this results in saving one additional register > unnecessarily in the stmia. We could use a stmib there instead which > would avoid that issue while keeping the rest of the change. > Hi Russel, BTW I used ETM to check the number of cycles used to store the extra register with and without this patch and with both cases it takes 7 cycles. My platform uses Cortex-A8 (AM335x SoC). Thanks, -Joel -- To unsubscribe from this list: send the line "unsubscribe linux-omap" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
