Hi all, Now i worked on omp2 and met a probelm which someplace close_irq for 3.6second. The kernel version is 2.6.37. I used trace to find in irq_action:omap_hsmmc_irq. This problem occured by removed the sdcard when there are io operations. I found the read problem is in omap_hsmmc_reset_controller_fsm. In omap_hsmmc_reset_controller_fsm: >static inline void omap_hsmmc_reset_controller_fsm(struct omap_hsmmc_host *host, > unsigned long bit) >{ > unsigned long i = 0; > unsigned long limit = (loops_per_jiffy * > msecs_to_jiffies(MMC_TIMEOUT_MS)); > OMAP_HSMMC_WRITE(host->base, SYSCTL, > OMAP_HSMMC_READ(host->base, SYSCTL) | bit); > /* > * OMAP4 ES2 and greater has an updated reset logic. > * Monitor a 0->1 transition first > */ > if (mmc_slot(host).features & HSMMC_HAS_UPDATED_RESET) { > while ((!(OMAP_HSMMC_READ(host->base, SYSCTL) & bit)) > && (i++ < limit)) > cpu_relax(); } In func, it used loops_per_jiffy in order to avoid do many time exceed MMC_TIMEOUT_MS. In face oops_per_jiify is like: while(i++ < loops_per_jiffy) cpu_relax(); But actually, it used as follow: >while ((!(OMAP_HSMMC_READ(host->base, SYSCTL) & bit)) > && (i++ < limit)) it add some operations like: read regisger, &, &&. So the time may exceed MMC_TIMEOUT_MS. I used those code to test and found it's ok: for (i = 0 ; i < 10; i++){ if (!(OMAP_HSMMC_READ(host->base, SYSCTL) & bit)) break; j = limit/10; while(j--) cpu_relax(); } Using this the problom can't occur. Am i missing something? Thanks! Jianpeng Ma?韬{.n?????%??檩??w?{.n???{炳??Ф?塄}?财??j:+v??????2??璀??摺?囤??z夸z罐?+?????w棹f