Quoting Mohammed, Afzal (2013-01-25 04:18:22) > Hi Paul, > > On Fri, Jan 25, 2013 at 13:48:11, Paul Walmsley wrote: > > On Wed, 23 Jan 2013, Afzal Mohammed wrote: > > > > Currently round rate function would return proper rate iff requested > > > rate exactly matches the PLL lockable rate. This causes set_rate to > > > fail if exact rate could not be set. Instead round rate may return > > > closest rate possible (less than the requested). And if any user is > > > badly in need of exact rate, then return value of round rate could > > > be used to decide whether to invoke set rate or not. > > > > > > Modify round rate so that it return closest possible rate. > > > > This doesn't look like the right approach to me. For some PLLs, an exact > > rate is desired. > > If exact rate is required, there is a way to achieve it as mentioned > in the commit message, i.e. by first invoking round rate over reqd. rate > and if it doesn't match, bail out w/o invoking set_rate. > > And it seems requirement of CCF w.r.t to round rate is to return closest > possible rate. Is MULT_ROUND_UP doing the right thing for you in the clk_divider code? What is the clock rate requested of the parent PLL? I just want to make sure that we're doing the right thing in the basic divider code. Thanks, Mike -- To unsubscribe from this list: send the line "unsubscribe linux-omap" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
