Hi Paul,
Any comments on this?
-----Original Message-----
From: J, KEERTHY
Sent: Friday, January 18, 2013 3:52 PM
To: linux-omap@xxxxxxxxxxxxxxx; paul@xxxxxxxxx
Cc: J, KEERTHY; Valentin, Eduardo
Subject: [PATCH] ARM: OMAP2+: OMAP44XX: Clock: Correct the clock identifiers for OMAP4460 and OMAP4430
The previous logic to detect the clocks for OMAP4460
was to combine the clocks marked as CK_443X and CK_446X. This would be
fine as long as OMAP4460 was a super set of OMAP4430 clock set.
This is not the case as there are clocks which are specific to OMAP4430
(for example bandgap_fclk) and some which are specific to OMAP4460(for example
bandgap_ts_fclk).
The clock "bandgap_fclk" is specific for OMAP4430 and
this was added as part of OMAP4460 clock set which should not be done.
Hence changing the convention.
CK_446X --------> Clocks specific to OMAP4460
CK_443X --------> Clocks specific to OMAP4430
CK_44XX (CK_446X | CK_443X) --------> Common to both OMAP4460 and OMAP4430
Boot Tested on both Panda and Panda-es.
Signed-off-by: J Keerthy <j-keerthy@xxxxxx>
Reviewed-by: Rajendra Nayak <rnayak@xxxxxx>
Cc: Paul Walmsley <paul@xxxxxxxxx>
Cc: Eduardo Valentin <eduardo.valentin@xxxxxx>
---
arch/arm/mach-omap2/cclock44xx_data.c | 578 ++++++++++++++++----------------
arch/arm/mach-omap2/clock.h | 6 +-
2 files changed, 292 insertions(+), 292 deletions(-)
diff --git a/arch/arm/mach-omap2/cclock44xx_data.c b/arch/arm/mach-omap2/cclock44xx_data.c
index 5789a5e..ea349da 100644
--- a/arch/arm/mach-omap2/cclock44xx_data.c
+++ b/arch/arm/mach-omap2/cclock44xx_data.c
@@ -1686,298 +1686,298 @@ DEFINE_CLK_MUX(auxclkreq5_ck, auxclkreq_ck_parents, NULL, 0x0,
*/
static struct omap_clk omap44xx_clks[] = {
- CLK(NULL, "extalt_clkin_ck", &extalt_clkin_ck, CK_443X),
- CLK(NULL, "pad_clks_src_ck", &pad_clks_src_ck, CK_443X),
- CLK(NULL, "pad_clks_ck", &pad_clks_ck, CK_443X),
- CLK(NULL, "pad_slimbus_core_clks_ck", &pad_slimbus_core_clks_ck, CK_443X),
- CLK(NULL, "secure_32k_clk_src_ck", &secure_32k_clk_src_ck, CK_443X),
- CLK(NULL, "slimbus_src_clk", &slimbus_src_clk, CK_443X),
- CLK(NULL, "slimbus_clk", &slimbus_clk, CK_443X),
- CLK(NULL, "sys_32k_ck", &sys_32k_ck, CK_443X),
- CLK(NULL, "virt_12000000_ck", &virt_12000000_ck, CK_443X),
- CLK(NULL, "virt_13000000_ck", &virt_13000000_ck, CK_443X),
- CLK(NULL, "virt_16800000_ck", &virt_16800000_ck, CK_443X),
- CLK(NULL, "virt_19200000_ck", &virt_19200000_ck, CK_443X),
- CLK(NULL, "virt_26000000_ck", &virt_26000000_ck, CK_443X),
- CLK(NULL, "virt_27000000_ck", &virt_27000000_ck, CK_443X),
- CLK(NULL, "virt_38400000_ck", &virt_38400000_ck, CK_443X),
- CLK(NULL, "sys_clkin_ck", &sys_clkin_ck, CK_443X),
- CLK(NULL, "tie_low_clock_ck", &tie_low_clock_ck, CK_443X),
- CLK(NULL, "utmi_phy_clkout_ck", &utmi_phy_clkout_ck, CK_443X),
- CLK(NULL, "xclk60mhsp1_ck", &xclk60mhsp1_ck, CK_443X),
- CLK(NULL, "xclk60mhsp2_ck", &xclk60mhsp2_ck, CK_443X),
- CLK(NULL, "xclk60motg_ck", &xclk60motg_ck, CK_443X),
- CLK(NULL, "abe_dpll_bypass_clk_mux_ck", &abe_dpll_bypass_clk_mux_ck, CK_443X),
- CLK(NULL, "abe_dpll_refclk_mux_ck", &abe_dpll_refclk_mux_ck, CK_443X),
- CLK(NULL, "dpll_abe_ck", &dpll_abe_ck, CK_443X),
- CLK(NULL, "dpll_abe_x2_ck", &dpll_abe_x2_ck, CK_443X),
- CLK(NULL, "dpll_abe_m2x2_ck", &dpll_abe_m2x2_ck, CK_443X),
- CLK(NULL, "abe_24m_fclk", &abe_24m_fclk, CK_443X),
- CLK(NULL, "abe_clk", &abe_clk, CK_443X),
- CLK(NULL, "aess_fclk", &aess_fclk, CK_443X),
- CLK(NULL, "dpll_abe_m3x2_ck", &dpll_abe_m3x2_ck, CK_443X),
- CLK(NULL, "core_hsd_byp_clk_mux_ck", &core_hsd_byp_clk_mux_ck, CK_443X),
- CLK(NULL, "dpll_core_ck", &dpll_core_ck, CK_443X),
- CLK(NULL, "dpll_core_x2_ck", &dpll_core_x2_ck, CK_443X),
- CLK(NULL, "dpll_core_m6x2_ck", &dpll_core_m6x2_ck, CK_443X),
- CLK(NULL, "dbgclk_mux_ck", &dbgclk_mux_ck, CK_443X),
- CLK(NULL, "dpll_core_m2_ck", &dpll_core_m2_ck, CK_443X),
- CLK(NULL, "ddrphy_ck", &ddrphy_ck, CK_443X),
- CLK(NULL, "dpll_core_m5x2_ck", &dpll_core_m5x2_ck, CK_443X),
- CLK(NULL, "div_core_ck", &div_core_ck, CK_443X),
- CLK(NULL, "div_iva_hs_clk", &div_iva_hs_clk, CK_443X),
- CLK(NULL, "div_mpu_hs_clk", &div_mpu_hs_clk, CK_443X),
- CLK(NULL, "dpll_core_m4x2_ck", &dpll_core_m4x2_ck, CK_443X),
- CLK(NULL, "dll_clk_div_ck", &dll_clk_div_ck, CK_443X),
- CLK(NULL, "dpll_abe_m2_ck", &dpll_abe_m2_ck, CK_443X),
- CLK(NULL, "dpll_core_m3x2_ck", &dpll_core_m3x2_ck, CK_443X),
- CLK(NULL, "dpll_core_m7x2_ck", &dpll_core_m7x2_ck, CK_443X),
- CLK(NULL, "iva_hsd_byp_clk_mux_ck", &iva_hsd_byp_clk_mux_ck, CK_443X),
- CLK(NULL, "dpll_iva_ck", &dpll_iva_ck, CK_443X),
- CLK(NULL, "dpll_iva_x2_ck", &dpll_iva_x2_ck, CK_443X),
- CLK(NULL, "dpll_iva_m4x2_ck", &dpll_iva_m4x2_ck, CK_443X),
- CLK(NULL, "dpll_iva_m5x2_ck", &dpll_iva_m5x2_ck, CK_443X),
- CLK(NULL, "dpll_mpu_ck", &dpll_mpu_ck, CK_443X),
- CLK(NULL, "dpll_mpu_m2_ck", &dpll_mpu_m2_ck, CK_443X),
- CLK(NULL, "per_hs_clk_div_ck", &per_hs_clk_div_ck, CK_443X),
- CLK(NULL, "per_hsd_byp_clk_mux_ck", &per_hsd_byp_clk_mux_ck, CK_443X),
- CLK(NULL, "dpll_per_ck", &dpll_per_ck, CK_443X),
- CLK(NULL, "dpll_per_m2_ck", &dpll_per_m2_ck, CK_443X),
- CLK(NULL, "dpll_per_x2_ck", &dpll_per_x2_ck, CK_443X),
- CLK(NULL, "dpll_per_m2x2_ck", &dpll_per_m2x2_ck, CK_443X),
- CLK(NULL, "dpll_per_m3x2_ck", &dpll_per_m3x2_ck, CK_443X),
- CLK(NULL, "dpll_per_m4x2_ck", &dpll_per_m4x2_ck, CK_443X),
- CLK(NULL, "dpll_per_m5x2_ck", &dpll_per_m5x2_ck, CK_443X),
- CLK(NULL, "dpll_per_m6x2_ck", &dpll_per_m6x2_ck, CK_443X),
- CLK(NULL, "dpll_per_m7x2_ck", &dpll_per_m7x2_ck, CK_443X),
- CLK(NULL, "usb_hs_clk_div_ck", &usb_hs_clk_div_ck, CK_443X),
- CLK(NULL, "dpll_usb_ck", &dpll_usb_ck, CK_443X),
- CLK(NULL, "dpll_usb_clkdcoldo_ck", &dpll_usb_clkdcoldo_ck, CK_443X),
- CLK(NULL, "dpll_usb_m2_ck", &dpll_usb_m2_ck, CK_443X),
- CLK(NULL, "ducati_clk_mux_ck", &ducati_clk_mux_ck, CK_443X),
- CLK(NULL, "func_12m_fclk", &func_12m_fclk, CK_443X),
- CLK(NULL, "func_24m_clk", &func_24m_clk, CK_443X),
- CLK(NULL, "func_24mc_fclk", &func_24mc_fclk, CK_443X),
- CLK(NULL, "func_48m_fclk", &func_48m_fclk, CK_443X),
- CLK(NULL, "func_48mc_fclk", &func_48mc_fclk, CK_443X),
- CLK(NULL, "func_64m_fclk", &func_64m_fclk, CK_443X),
- CLK(NULL, "func_96m_fclk", &func_96m_fclk, CK_443X),
- CLK(NULL, "init_60m_fclk", &init_60m_fclk, CK_443X),
- CLK(NULL, "l3_div_ck", &l3_div_ck, CK_443X),
- CLK(NULL, "l4_div_ck", &l4_div_ck, CK_443X),
- CLK(NULL, "lp_clk_div_ck", &lp_clk_div_ck, CK_443X),
- CLK(NULL, "l4_wkup_clk_mux_ck", &l4_wkup_clk_mux_ck, CK_443X),
- CLK("smp_twd", NULL, &mpu_periphclk, CK_443X),
- CLK(NULL, "ocp_abe_iclk", &ocp_abe_iclk, CK_443X),
- CLK(NULL, "per_abe_24m_fclk", &per_abe_24m_fclk, CK_443X),
- CLK(NULL, "per_abe_nc_fclk", &per_abe_nc_fclk, CK_443X),
- CLK(NULL, "syc_clk_div_ck", &syc_clk_div_ck, CK_443X),
- CLK(NULL, "aes1_fck", &aes1_fck, CK_443X),
- CLK(NULL, "aes2_fck", &aes2_fck, CK_443X),
- CLK(NULL, "aess_fck", &aess_fck, CK_443X),
+ CLK(NULL, "extalt_clkin_ck", &extalt_clkin_ck, CK_44XX),
+ CLK(NULL, "pad_clks_src_ck", &pad_clks_src_ck, CK_44XX),
+ CLK(NULL, "pad_clks_ck", &pad_clks_ck, CK_44XX),
+ CLK(NULL, "pad_slimbus_core_clks_ck", &pad_slimbus_core_clks_ck, CK_44XX),
+ CLK(NULL, "secure_32k_clk_src_ck", &secure_32k_clk_src_ck, CK_44XX),
+ CLK(NULL, "slimbus_src_clk", &slimbus_src_clk, CK_44XX),
+ CLK(NULL, "slimbus_clk", &slimbus_clk, CK_44XX),
+ CLK(NULL, "sys_32k_ck", &sys_32k_ck, CK_44XX),
+ CLK(NULL, "virt_12000000_ck", &virt_12000000_ck, CK_44XX),
+ CLK(NULL, "virt_13000000_ck", &virt_13000000_ck, CK_44XX),
+ CLK(NULL, "virt_16800000_ck", &virt_16800000_ck, CK_44XX),
+ CLK(NULL, "virt_19200000_ck", &virt_19200000_ck, CK_44XX),
+ CLK(NULL, "virt_26000000_ck", &virt_26000000_ck, CK_44XX),
+ CLK(NULL, "virt_27000000_ck", &virt_27000000_ck, CK_44XX),
+ CLK(NULL, "virt_38400000_ck", &virt_38400000_ck, CK_44XX),
+ CLK(NULL, "sys_clkin_ck", &sys_clkin_ck, CK_44XX),
+ CLK(NULL, "tie_low_clock_ck", &tie_low_clock_ck, CK_44XX),
+ CLK(NULL, "utmi_phy_clkout_ck", &utmi_phy_clkout_ck, CK_44XX),
+ CLK(NULL, "xclk60mhsp1_ck", &xclk60mhsp1_ck, CK_44XX),
+ CLK(NULL, "xclk60mhsp2_ck", &xclk60mhsp2_ck, CK_44XX),
+ CLK(NULL, "xclk60motg_ck", &xclk60motg_ck, CK_44XX),
+ CLK(NULL, "abe_dpll_bypass_clk_mux_ck", &abe_dpll_bypass_clk_mux_ck, CK_44XX),
+ CLK(NULL, "abe_dpll_refclk_mux_ck", &abe_dpll_refclk_mux_ck, CK_44XX),
+ CLK(NULL, "dpll_abe_ck", &dpll_abe_ck, CK_44XX),
+ CLK(NULL, "dpll_abe_x2_ck", &dpll_abe_x2_ck, CK_44XX),
+ CLK(NULL, "dpll_abe_m2x2_ck", &dpll_abe_m2x2_ck, CK_44XX),
+ CLK(NULL, "abe_24m_fclk", &abe_24m_fclk, CK_44XX),
+ CLK(NULL, "abe_clk", &abe_clk, CK_44XX),
+ CLK(NULL, "aess_fclk", &aess_fclk, CK_44XX),
+ CLK(NULL, "dpll_abe_m3x2_ck", &dpll_abe_m3x2_ck, CK_44XX),
+ CLK(NULL, "core_hsd_byp_clk_mux_ck", &core_hsd_byp_clk_mux_ck, CK_44XX),
+ CLK(NULL, "dpll_core_ck", &dpll_core_ck, CK_44XX),
+ CLK(NULL, "dpll_core_x2_ck", &dpll_core_x2_ck, CK_44XX),
+ CLK(NULL, "dpll_core_m6x2_ck", &dpll_core_m6x2_ck, CK_44XX),
+ CLK(NULL, "dbgclk_mux_ck", &dbgclk_mux_ck, CK_44XX),
+ CLK(NULL, "dpll_core_m2_ck", &dpll_core_m2_ck, CK_44XX),
+ CLK(NULL, "ddrphy_ck", &ddrphy_ck, CK_44XX),
+ CLK(NULL, "dpll_core_m5x2_ck", &dpll_core_m5x2_ck, CK_44XX),
+ CLK(NULL, "div_core_ck", &div_core_ck, CK_44XX),
+ CLK(NULL, "div_iva_hs_clk", &div_iva_hs_clk, CK_44XX),
+ CLK(NULL, "div_mpu_hs_clk", &div_mpu_hs_clk, CK_44XX),
+ CLK(NULL, "dpll_core_m4x2_ck", &dpll_core_m4x2_ck, CK_44XX),
+ CLK(NULL, "dll_clk_div_ck", &dll_clk_div_ck, CK_44XX),
+ CLK(NULL, "dpll_abe_m2_ck", &dpll_abe_m2_ck, CK_44XX),
+ CLK(NULL, "dpll_core_m3x2_ck", &dpll_core_m3x2_ck, CK_44XX),
+ CLK(NULL, "dpll_core_m7x2_ck", &dpll_core_m7x2_ck, CK_44XX),
+ CLK(NULL, "iva_hsd_byp_clk_mux_ck", &iva_hsd_byp_clk_mux_ck, CK_44XX),
+ CLK(NULL, "dpll_iva_ck", &dpll_iva_ck, CK_44XX),
+ CLK(NULL, "dpll_iva_x2_ck", &dpll_iva_x2_ck, CK_44XX),
+ CLK(NULL, "dpll_iva_m4x2_ck", &dpll_iva_m4x2_ck, CK_44XX),
+ CLK(NULL, "dpll_iva_m5x2_ck", &dpll_iva_m5x2_ck, CK_44XX),
+ CLK(NULL, "dpll_mpu_ck", &dpll_mpu_ck, CK_44XX),
+ CLK(NULL, "dpll_mpu_m2_ck", &dpll_mpu_m2_ck, CK_44XX),
+ CLK(NULL, "per_hs_clk_div_ck", &per_hs_clk_div_ck, CK_44XX),
+ CLK(NULL, "per_hsd_byp_clk_mux_ck", &per_hsd_byp_clk_mux_ck, CK_44XX),
+ CLK(NULL, "dpll_per_ck", &dpll_per_ck, CK_44XX),
+ CLK(NULL, "dpll_per_m2_ck", &dpll_per_m2_ck, CK_44XX),
+ CLK(NULL, "dpll_per_x2_ck", &dpll_per_x2_ck, CK_44XX),
+ CLK(NULL, "dpll_per_m2x2_ck", &dpll_per_m2x2_ck, CK_44XX),
+ CLK(NULL, "dpll_per_m3x2_ck", &dpll_per_m3x2_ck, CK_44XX),
+ CLK(NULL, "dpll_per_m4x2_ck", &dpll_per_m4x2_ck, CK_44XX),
+ CLK(NULL, "dpll_per_m5x2_ck", &dpll_per_m5x2_ck, CK_44XX),
+ CLK(NULL, "dpll_per_m6x2_ck", &dpll_per_m6x2_ck, CK_44XX),
+ CLK(NULL, "dpll_per_m7x2_ck", &dpll_per_m7x2_ck, CK_44XX),
+ CLK(NULL, "usb_hs_clk_div_ck", &usb_hs_clk_div_ck, CK_44XX),
+ CLK(NULL, "dpll_usb_ck", &dpll_usb_ck, CK_44XX),
+ CLK(NULL, "dpll_usb_clkdcoldo_ck", &dpll_usb_clkdcoldo_ck, CK_44XX),
+ CLK(NULL, "dpll_usb_m2_ck", &dpll_usb_m2_ck, CK_44XX),
+ CLK(NULL, "ducati_clk_mux_ck", &ducati_clk_mux_ck, CK_44XX),
+ CLK(NULL, "func_12m_fclk", &func_12m_fclk, CK_44XX),
+ CLK(NULL, "func_24m_clk", &func_24m_clk, CK_44XX),
+ CLK(NULL, "func_24mc_fclk", &func_24mc_fclk, CK_44XX),
+ CLK(NULL, "func_48m_fclk", &func_48m_fclk, CK_44XX),
+ CLK(NULL, "func_48mc_fclk", &func_48mc_fclk, CK_44XX),
+ CLK(NULL, "func_64m_fclk", &func_64m_fclk, CK_44XX),
+ CLK(NULL, "func_96m_fclk", &func_96m_fclk, CK_44XX),
+ CLK(NULL, "init_60m_fclk", &init_60m_fclk, CK_44XX),
+ CLK(NULL, "l3_div_ck", &l3_div_ck, CK_44XX),
+ CLK(NULL, "l4_div_ck", &l4_div_ck, CK_44XX),
+ CLK(NULL, "lp_clk_div_ck", &lp_clk_div_ck, CK_44XX),
+ CLK(NULL, "l4_wkup_clk_mux_ck", &l4_wkup_clk_mux_ck, CK_44XX),
+ CLK("smp_twd", NULL, &mpu_periphclk, CK_44XX),
+ CLK(NULL, "ocp_abe_iclk", &ocp_abe_iclk, CK_44XX),
+ CLK(NULL, "per_abe_24m_fclk", &per_abe_24m_fclk, CK_44XX),
+ CLK(NULL, "per_abe_nc_fclk", &per_abe_nc_fclk, CK_44XX),
+ CLK(NULL, "syc_clk_div_ck", &syc_clk_div_ck, CK_44XX),
+ CLK(NULL, "aes1_fck", &aes1_fck, CK_44XX),
+ CLK(NULL, "aes2_fck", &aes2_fck, CK_44XX),
+ CLK(NULL, "aess_fck", &aess_fck, CK_44XX),
CLK(NULL, "bandgap_fclk", &bandgap_fclk, CK_443X),
CLK(NULL, "div_ts_ck", &div_ts_ck, CK_446X),
CLK(NULL, "bandgap_ts_fclk", &bandgap_ts_fclk, CK_446X),
- CLK(NULL, "des3des_fck", &des3des_fck, CK_443X),
- CLK(NULL, "dmic_sync_mux_ck", &dmic_sync_mux_ck, CK_443X),
- CLK(NULL, "dmic_fck", &dmic_fck, CK_443X),
- CLK(NULL, "dsp_fck", &dsp_fck, CK_443X),
- CLK(NULL, "dss_sys_clk", &dss_sys_clk, CK_443X),
- CLK(NULL, "dss_tv_clk", &dss_tv_clk, CK_443X),
- CLK(NULL, "dss_dss_clk", &dss_dss_clk, CK_443X),
- CLK(NULL, "dss_48mhz_clk", &dss_48mhz_clk, CK_443X),
- CLK(NULL, "dss_fck", &dss_fck, CK_443X),
- CLK("omapdss_dss", "ick", &dss_fck, CK_443X),
- CLK(NULL, "efuse_ctrl_cust_fck", &efuse_ctrl_cust_fck, CK_443X),
- CLK(NULL, "emif1_fck", &emif1_fck, CK_443X),
- CLK(NULL, "emif2_fck", &emif2_fck, CK_443X),
- CLK(NULL, "fdif_fck", &fdif_fck, CK_443X),
- CLK(NULL, "fpka_fck", &fpka_fck, CK_443X),
- CLK(NULL, "gpio1_dbclk", &gpio1_dbclk, CK_443X),
- CLK(NULL, "gpio1_ick", &gpio1_ick, CK_443X),
- CLK(NULL, "gpio2_dbclk", &gpio2_dbclk, CK_443X),
- CLK(NULL, "gpio2_ick", &gpio2_ick, CK_443X),
- CLK(NULL, "gpio3_dbclk", &gpio3_dbclk, CK_443X),
- CLK(NULL, "gpio3_ick", &gpio3_ick, CK_443X),
- CLK(NULL, "gpio4_dbclk", &gpio4_dbclk, CK_443X),
- CLK(NULL, "gpio4_ick", &gpio4_ick, CK_443X),
- CLK(NULL, "gpio5_dbclk", &gpio5_dbclk, CK_443X),
- CLK(NULL, "gpio5_ick", &gpio5_ick, CK_443X),
- CLK(NULL, "gpio6_dbclk", &gpio6_dbclk, CK_443X),
- CLK(NULL, "gpio6_ick", &gpio6_ick, CK_443X),
- CLK(NULL, "gpmc_ick", &gpmc_ick, CK_443X),
- CLK(NULL, "gpu_fck", &gpu_fck, CK_443X),
- CLK(NULL, "hdq1w_fck", &hdq1w_fck, CK_443X),
- CLK(NULL, "hsi_fck", &hsi_fck, CK_443X),
- CLK(NULL, "i2c1_fck", &i2c1_fck, CK_443X),
- CLK(NULL, "i2c2_fck", &i2c2_fck, CK_443X),
- CLK(NULL, "i2c3_fck", &i2c3_fck, CK_443X),
- CLK(NULL, "i2c4_fck", &i2c4_fck, CK_443X),
- CLK(NULL, "ipu_fck", &ipu_fck, CK_443X),
- CLK(NULL, "iss_ctrlclk", &iss_ctrlclk, CK_443X),
- CLK(NULL, "iss_fck", &iss_fck, CK_443X),
- CLK(NULL, "iva_fck", &iva_fck, CK_443X),
- CLK(NULL, "kbd_fck", &kbd_fck, CK_443X),
- CLK(NULL, "l3_instr_ick", &l3_instr_ick, CK_443X),
- CLK(NULL, "l3_main_3_ick", &l3_main_3_ick, CK_443X),
- CLK(NULL, "mcasp_sync_mux_ck", &mcasp_sync_mux_ck, CK_443X),
- CLK(NULL, "mcasp_fck", &mcasp_fck, CK_443X),
- CLK(NULL, "mcbsp1_sync_mux_ck", &mcbsp1_sync_mux_ck, CK_443X),
- CLK(NULL, "mcbsp1_fck", &mcbsp1_fck, CK_443X),
- CLK(NULL, "mcbsp2_sync_mux_ck", &mcbsp2_sync_mux_ck, CK_443X),
- CLK(NULL, "mcbsp2_fck", &mcbsp2_fck, CK_443X),
- CLK(NULL, "mcbsp3_sync_mux_ck", &mcbsp3_sync_mux_ck, CK_443X),
- CLK(NULL, "mcbsp3_fck", &mcbsp3_fck, CK_443X),
- CLK(NULL, "mcbsp4_sync_mux_ck", &mcbsp4_sync_mux_ck, CK_443X),
- CLK(NULL, "mcbsp4_fck", &mcbsp4_fck, CK_443X),
- CLK(NULL, "mcpdm_fck", &mcpdm_fck, CK_443X),
- CLK(NULL, "mcspi1_fck", &mcspi1_fck, CK_443X),
- CLK(NULL, "mcspi2_fck", &mcspi2_fck, CK_443X),
- CLK(NULL, "mcspi3_fck", &mcspi3_fck, CK_443X),
- CLK(NULL, "mcspi4_fck", &mcspi4_fck, CK_443X),
- CLK(NULL, "mmc1_fck", &mmc1_fck, CK_443X),
- CLK(NULL, "mmc2_fck", &mmc2_fck, CK_443X),
- CLK(NULL, "mmc3_fck", &mmc3_fck, CK_443X),
- CLK(NULL, "mmc4_fck", &mmc4_fck, CK_443X),
- CLK(NULL, "mmc5_fck", &mmc5_fck, CK_443X),
- CLK(NULL, "ocp2scp_usb_phy_phy_48m", &ocp2scp_usb_phy_phy_48m, CK_443X),
- CLK(NULL, "ocp2scp_usb_phy_ick", &ocp2scp_usb_phy_ick, CK_443X),
- CLK(NULL, "ocp_wp_noc_ick", &ocp_wp_noc_ick, CK_443X),
- CLK(NULL, "rng_ick", &rng_ick, CK_443X),
- CLK("omap_rng", "ick", &rng_ick, CK_443X),
- CLK(NULL, "sha2md5_fck", &sha2md5_fck, CK_443X),
- CLK(NULL, "sl2if_ick", &sl2if_ick, CK_443X),
- CLK(NULL, "slimbus1_fclk_1", &slimbus1_fclk_1, CK_443X),
- CLK(NULL, "slimbus1_fclk_0", &slimbus1_fclk_0, CK_443X),
- CLK(NULL, "slimbus1_fclk_2", &slimbus1_fclk_2, CK_443X),
- CLK(NULL, "slimbus1_slimbus_clk", &slimbus1_slimbus_clk, CK_443X),
- CLK(NULL, "slimbus1_fck", &slimbus1_fck, CK_443X),
- CLK(NULL, "slimbus2_fclk_1", &slimbus2_fclk_1, CK_443X),
- CLK(NULL, "slimbus2_fclk_0", &slimbus2_fclk_0, CK_443X),
- CLK(NULL, "slimbus2_slimbus_clk", &slimbus2_slimbus_clk, CK_443X),
- CLK(NULL, "slimbus2_fck", &slimbus2_fck, CK_443X),
- CLK(NULL, "smartreflex_core_fck", &smartreflex_core_fck, CK_443X),
- CLK(NULL, "smartreflex_iva_fck", &smartreflex_iva_fck, CK_443X),
- CLK(NULL, "smartreflex_mpu_fck", &smartreflex_mpu_fck, CK_443X),
- CLK(NULL, "timer1_fck", &timer1_fck, CK_443X),
- CLK(NULL, "timer10_fck", &timer10_fck, CK_443X),
- CLK(NULL, "timer11_fck", &timer11_fck, CK_443X),
- CLK(NULL, "timer2_fck", &timer2_fck, CK_443X),
- CLK(NULL, "timer3_fck", &timer3_fck, CK_443X),
- CLK(NULL, "timer4_fck", &timer4_fck, CK_443X),
- CLK(NULL, "timer5_fck", &timer5_fck, CK_443X),
- CLK(NULL, "timer6_fck", &timer6_fck, CK_443X),
- CLK(NULL, "timer7_fck", &timer7_fck, CK_443X),
- CLK(NULL, "timer8_fck", &timer8_fck, CK_443X),
- CLK(NULL, "timer9_fck", &timer9_fck, CK_443X),
- CLK(NULL, "uart1_fck", &uart1_fck, CK_443X),
- CLK(NULL, "uart2_fck", &uart2_fck, CK_443X),
- CLK(NULL, "uart3_fck", &uart3_fck, CK_443X),
- CLK(NULL, "uart4_fck", &uart4_fck, CK_443X),
- CLK(NULL, "usb_host_fs_fck", &usb_host_fs_fck, CK_443X),
- CLK("usbhs_omap", "fs_fck", &usb_host_fs_fck, CK_443X),
- CLK(NULL, "utmi_p1_gfclk", &utmi_p1_gfclk, CK_443X),
- CLK(NULL, "usb_host_hs_utmi_p1_clk", &usb_host_hs_utmi_p1_clk, CK_443X),
- CLK(NULL, "utmi_p2_gfclk", &utmi_p2_gfclk, CK_443X),
- CLK(NULL, "usb_host_hs_utmi_p2_clk", &usb_host_hs_utmi_p2_clk, CK_443X),
- CLK(NULL, "usb_host_hs_utmi_p3_clk", &usb_host_hs_utmi_p3_clk, CK_443X),
- CLK(NULL, "usb_host_hs_hsic480m_p1_clk", &usb_host_hs_hsic480m_p1_clk, CK_443X),
- CLK(NULL, "usb_host_hs_hsic60m_p1_clk", &usb_host_hs_hsic60m_p1_clk, CK_443X),
- CLK(NULL, "usb_host_hs_hsic60m_p2_clk", &usb_host_hs_hsic60m_p2_clk, CK_443X),
- CLK(NULL, "usb_host_hs_hsic480m_p2_clk", &usb_host_hs_hsic480m_p2_clk, CK_443X),
- CLK(NULL, "usb_host_hs_func48mclk", &usb_host_hs_func48mclk, CK_443X),
- CLK(NULL, "usb_host_hs_fck", &usb_host_hs_fck, CK_443X),
- CLK("usbhs_omap", "hs_fck", &usb_host_hs_fck, CK_443X),
- CLK(NULL, "otg_60m_gfclk", &otg_60m_gfclk, CK_443X),
- CLK(NULL, "usb_otg_hs_xclk", &usb_otg_hs_xclk, CK_443X),
- CLK(NULL, "usb_otg_hs_ick", &usb_otg_hs_ick, CK_443X),
- CLK("musb-omap2430", "ick", &usb_otg_hs_ick, CK_443X),
- CLK(NULL, "usb_phy_cm_clk32k", &usb_phy_cm_clk32k, CK_443X),
- CLK(NULL, "usb_tll_hs_usb_ch2_clk", &usb_tll_hs_usb_ch2_clk, CK_443X),
- CLK(NULL, "usb_tll_hs_usb_ch0_clk", &usb_tll_hs_usb_ch0_clk, CK_443X),
- CLK(NULL, "usb_tll_hs_usb_ch1_clk", &usb_tll_hs_usb_ch1_clk, CK_443X),
- CLK(NULL, "usb_tll_hs_ick", &usb_tll_hs_ick, CK_443X),
- CLK("usbhs_omap", "usbtll_ick", &usb_tll_hs_ick, CK_443X),
- CLK("usbhs_tll", "usbtll_ick", &usb_tll_hs_ick, CK_443X),
- CLK(NULL, "usim_ck", &usim_ck, CK_443X),
- CLK(NULL, "usim_fclk", &usim_fclk, CK_443X),
- CLK(NULL, "usim_fck", &usim_fck, CK_443X),
- CLK(NULL, "wd_timer2_fck", &wd_timer2_fck, CK_443X),
- CLK(NULL, "wd_timer3_fck", &wd_timer3_fck, CK_443X),
- CLK(NULL, "pmd_stm_clock_mux_ck", &pmd_stm_clock_mux_ck, CK_443X),
- CLK(NULL, "pmd_trace_clk_mux_ck", &pmd_trace_clk_mux_ck, CK_443X),
- CLK(NULL, "stm_clk_div_ck", &stm_clk_div_ck, CK_443X),
- CLK(NULL, "trace_clk_div_ck", &trace_clk_div_ck, CK_443X),
- CLK(NULL, "auxclk0_src_ck", &auxclk0_src_ck, CK_443X),
- CLK(NULL, "auxclk0_ck", &auxclk0_ck, CK_443X),
- CLK(NULL, "auxclkreq0_ck", &auxclkreq0_ck, CK_443X),
- CLK(NULL, "auxclk1_src_ck", &auxclk1_src_ck, CK_443X),
- CLK(NULL, "auxclk1_ck", &auxclk1_ck, CK_443X),
- CLK(NULL, "auxclkreq1_ck", &auxclkreq1_ck, CK_443X),
- CLK(NULL, "auxclk2_src_ck", &auxclk2_src_ck, CK_443X),
- CLK(NULL, "auxclk2_ck", &auxclk2_ck, CK_443X),
- CLK(NULL, "auxclkreq2_ck", &auxclkreq2_ck, CK_443X),
- CLK(NULL, "auxclk3_src_ck", &auxclk3_src_ck, CK_443X),
- CLK(NULL, "auxclk3_ck", &auxclk3_ck, CK_443X),
- CLK(NULL, "auxclkreq3_ck", &auxclkreq3_ck, CK_443X),
- CLK(NULL, "auxclk4_src_ck", &auxclk4_src_ck, CK_443X),
- CLK(NULL, "auxclk4_ck", &auxclk4_ck, CK_443X),
- CLK(NULL, "auxclkreq4_ck", &auxclkreq4_ck, CK_443X),
- CLK(NULL, "auxclk5_src_ck", &auxclk5_src_ck, CK_443X),
- CLK(NULL, "auxclk5_ck", &auxclk5_ck, CK_443X),
- CLK(NULL, "auxclkreq5_ck", &auxclkreq5_ck, CK_443X),
- CLK("omap-gpmc", "fck", &dummy_ck, CK_443X),
- CLK("omap_i2c.1", "ick", &dummy_ck, CK_443X),
- CLK("omap_i2c.2", "ick", &dummy_ck, CK_443X),
- CLK("omap_i2c.3", "ick", &dummy_ck, CK_443X),
- CLK("omap_i2c.4", "ick", &dummy_ck, CK_443X),
- CLK(NULL, "mailboxes_ick", &dummy_ck, CK_443X),
- CLK("omap_hsmmc.0", "ick", &dummy_ck, CK_443X),
- CLK("omap_hsmmc.1", "ick", &dummy_ck, CK_443X),
- CLK("omap_hsmmc.2", "ick", &dummy_ck, CK_443X),
- CLK("omap_hsmmc.3", "ick", &dummy_ck, CK_443X),
- CLK("omap_hsmmc.4", "ick", &dummy_ck, CK_443X),
- CLK("omap-mcbsp.1", "ick", &dummy_ck, CK_443X),
- CLK("omap-mcbsp.2", "ick", &dummy_ck, CK_443X),
- CLK("omap-mcbsp.3", "ick", &dummy_ck, CK_443X),
- CLK("omap-mcbsp.4", "ick", &dummy_ck, CK_443X),
- CLK("omap2_mcspi.1", "ick", &dummy_ck, CK_443X),
- CLK("omap2_mcspi.2", "ick", &dummy_ck, CK_443X),
- CLK("omap2_mcspi.3", "ick", &dummy_ck, CK_443X),
- CLK("omap2_mcspi.4", "ick", &dummy_ck, CK_443X),
- CLK(NULL, "uart1_ick", &dummy_ck, CK_443X),
- CLK(NULL, "uart2_ick", &dummy_ck, CK_443X),
- CLK(NULL, "uart3_ick", &dummy_ck, CK_443X),
- CLK(NULL, "uart4_ick", &dummy_ck, CK_443X),
- CLK("usbhs_omap", "usbhost_ick", &dummy_ck, CK_443X),
- CLK("usbhs_omap", "usbtll_fck", &dummy_ck, CK_443X),
- CLK("usbhs_tll", "usbtll_fck", &dummy_ck, CK_443X),
- CLK("omap_wdt", "ick", &dummy_ck, CK_443X),
- CLK(NULL, "timer_32k_ck", &sys_32k_ck, CK_443X),
+ CLK(NULL, "des3des_fck", &des3des_fck, CK_44XX),
+ CLK(NULL, "dmic_sync_mux_ck", &dmic_sync_mux_ck, CK_44XX),
+ CLK(NULL, "dmic_fck", &dmic_fck, CK_44XX),
+ CLK(NULL, "dsp_fck", &dsp_fck, CK_44XX),
+ CLK(NULL, "dss_sys_clk", &dss_sys_clk, CK_44XX),
+ CLK(NULL, "dss_tv_clk", &dss_tv_clk, CK_44XX),
+ CLK(NULL, "dss_dss_clk", &dss_dss_clk, CK_44XX),
+ CLK(NULL, "dss_48mhz_clk", &dss_48mhz_clk, CK_44XX),
+ CLK(NULL, "dss_fck", &dss_fck, CK_44XX),
+ CLK("omapdss_dss", "ick", &dss_fck, CK_44XX),
+ CLK(NULL, "efuse_ctrl_cust_fck", &efuse_ctrl_cust_fck, CK_44XX),
+ CLK(NULL, "emif1_fck", &emif1_fck, CK_44XX),
+ CLK(NULL, "emif2_fck", &emif2_fck, CK_44XX),
+ CLK(NULL, "fdif_fck", &fdif_fck, CK_44XX),
+ CLK(NULL, "fpka_fck", &fpka_fck, CK_44XX),
+ CLK(NULL, "gpio1_dbclk", &gpio1_dbclk, CK_44XX),
+ CLK(NULL, "gpio1_ick", &gpio1_ick, CK_44XX),
+ CLK(NULL, "gpio2_dbclk", &gpio2_dbclk, CK_44XX),
+ CLK(NULL, "gpio2_ick", &gpio2_ick, CK_44XX),
+ CLK(NULL, "gpio3_dbclk", &gpio3_dbclk, CK_44XX),
+ CLK(NULL, "gpio3_ick", &gpio3_ick, CK_44XX),
+ CLK(NULL, "gpio4_dbclk", &gpio4_dbclk, CK_44XX),
+ CLK(NULL, "gpio4_ick", &gpio4_ick, CK_44XX),
+ CLK(NULL, "gpio5_dbclk", &gpio5_dbclk, CK_44XX),
+ CLK(NULL, "gpio5_ick", &gpio5_ick, CK_44XX),
+ CLK(NULL, "gpio6_dbclk", &gpio6_dbclk, CK_44XX),
+ CLK(NULL, "gpio6_ick", &gpio6_ick, CK_44XX),
+ CLK(NULL, "gpmc_ick", &gpmc_ick, CK_44XX),
+ CLK(NULL, "gpu_fck", &gpu_fck, CK_44XX),
+ CLK(NULL, "hdq1w_fck", &hdq1w_fck, CK_44XX),
+ CLK(NULL, "hsi_fck", &hsi_fck, CK_44XX),
+ CLK(NULL, "i2c1_fck", &i2c1_fck, CK_44XX),
+ CLK(NULL, "i2c2_fck", &i2c2_fck, CK_44XX),
+ CLK(NULL, "i2c3_fck", &i2c3_fck, CK_44XX),
+ CLK(NULL, "i2c4_fck", &i2c4_fck, CK_44XX),
+ CLK(NULL, "ipu_fck", &ipu_fck, CK_44XX),
+ CLK(NULL, "iss_ctrlclk", &iss_ctrlclk, CK_44XX),
+ CLK(NULL, "iss_fck", &iss_fck, CK_44XX),
+ CLK(NULL, "iva_fck", &iva_fck, CK_44XX),
+ CLK(NULL, "kbd_fck", &kbd_fck, CK_44XX),
+ CLK(NULL, "l3_instr_ick", &l3_instr_ick, CK_44XX),
+ CLK(NULL, "l3_main_3_ick", &l3_main_3_ick, CK_44XX),
+ CLK(NULL, "mcasp_sync_mux_ck", &mcasp_sync_mux_ck, CK_44XX),
+ CLK(NULL, "mcasp_fck", &mcasp_fck, CK_44XX),
+ CLK(NULL, "mcbsp1_sync_mux_ck", &mcbsp1_sync_mux_ck, CK_44XX),
+ CLK(NULL, "mcbsp1_fck", &mcbsp1_fck, CK_44XX),
+ CLK(NULL, "mcbsp2_sync_mux_ck", &mcbsp2_sync_mux_ck, CK_44XX),
+ CLK(NULL, "mcbsp2_fck", &mcbsp2_fck, CK_44XX),
+ CLK(NULL, "mcbsp3_sync_mux_ck", &mcbsp3_sync_mux_ck, CK_44XX),
+ CLK(NULL, "mcbsp3_fck", &mcbsp3_fck, CK_44XX),
+ CLK(NULL, "mcbsp4_sync_mux_ck", &mcbsp4_sync_mux_ck, CK_44XX),
+ CLK(NULL, "mcbsp4_fck", &mcbsp4_fck, CK_44XX),
+ CLK(NULL, "mcpdm_fck", &mcpdm_fck, CK_44XX),
+ CLK(NULL, "mcspi1_fck", &mcspi1_fck, CK_44XX),
+ CLK(NULL, "mcspi2_fck", &mcspi2_fck, CK_44XX),
+ CLK(NULL, "mcspi3_fck", &mcspi3_fck, CK_44XX),
+ CLK(NULL, "mcspi4_fck", &mcspi4_fck, CK_44XX),
+ CLK(NULL, "mmc1_fck", &mmc1_fck, CK_44XX),
+ CLK(NULL, "mmc2_fck", &mmc2_fck, CK_44XX),
+ CLK(NULL, "mmc3_fck", &mmc3_fck, CK_44XX),
+ CLK(NULL, "mmc4_fck", &mmc4_fck, CK_44XX),
+ CLK(NULL, "mmc5_fck", &mmc5_fck, CK_44XX),
+ CLK(NULL, "ocp2scp_usb_phy_phy_48m", &ocp2scp_usb_phy_phy_48m, CK_44XX),
+ CLK(NULL, "ocp2scp_usb_phy_ick", &ocp2scp_usb_phy_ick, CK_44XX),
+ CLK(NULL, "ocp_wp_noc_ick", &ocp_wp_noc_ick, CK_44XX),
+ CLK(NULL, "rng_ick", &rng_ick, CK_44XX),
+ CLK("omap_rng", "ick", &rng_ick, CK_44XX),
+ CLK(NULL, "sha2md5_fck", &sha2md5_fck, CK_44XX),
+ CLK(NULL, "sl2if_ick", &sl2if_ick, CK_44XX),
+ CLK(NULL, "slimbus1_fclk_1", &slimbus1_fclk_1, CK_44XX),
+ CLK(NULL, "slimbus1_fclk_0", &slimbus1_fclk_0, CK_44XX),
+ CLK(NULL, "slimbus1_fclk_2", &slimbus1_fclk_2, CK_44XX),
+ CLK(NULL, "slimbus1_slimbus_clk", &slimbus1_slimbus_clk, CK_44XX),
+ CLK(NULL, "slimbus1_fck", &slimbus1_fck, CK_44XX),
+ CLK(NULL, "slimbus2_fclk_1", &slimbus2_fclk_1, CK_44XX),
+ CLK(NULL, "slimbus2_fclk_0", &slimbus2_fclk_0, CK_44XX),
+ CLK(NULL, "slimbus2_slimbus_clk", &slimbus2_slimbus_clk, CK_44XX),
+ CLK(NULL, "slimbus2_fck", &slimbus2_fck, CK_44XX),
+ CLK(NULL, "smartreflex_core_fck", &smartreflex_core_fck, CK_44XX),
+ CLK(NULL, "smartreflex_iva_fck", &smartreflex_iva_fck, CK_44XX),
+ CLK(NULL, "smartreflex_mpu_fck", &smartreflex_mpu_fck, CK_44XX),
+ CLK(NULL, "timer1_fck", &timer1_fck, CK_44XX),
+ CLK(NULL, "timer10_fck", &timer10_fck, CK_44XX),
+ CLK(NULL, "timer11_fck", &timer11_fck, CK_44XX),
+ CLK(NULL, "timer2_fck", &timer2_fck, CK_44XX),
+ CLK(NULL, "timer3_fck", &timer3_fck, CK_44XX),
+ CLK(NULL, "timer4_fck", &timer4_fck, CK_44XX),
+ CLK(NULL, "timer5_fck", &timer5_fck, CK_44XX),
+ CLK(NULL, "timer6_fck", &timer6_fck, CK_44XX),
+ CLK(NULL, "timer7_fck", &timer7_fck, CK_44XX),
+ CLK(NULL, "timer8_fck", &timer8_fck, CK_44XX),
+ CLK(NULL, "timer9_fck", &timer9_fck, CK_44XX),
+ CLK(NULL, "uart1_fck", &uart1_fck, CK_44XX),
+ CLK(NULL, "uart2_fck", &uart2_fck, CK_44XX),
+ CLK(NULL, "uart3_fck", &uart3_fck, CK_44XX),
+ CLK(NULL, "uart4_fck", &uart4_fck, CK_44XX),
+ CLK(NULL, "usb_host_fs_fck", &usb_host_fs_fck, CK_44XX),
+ CLK("usbhs_omap", "fs_fck", &usb_host_fs_fck, CK_44XX),
+ CLK(NULL, "utmi_p1_gfclk", &utmi_p1_gfclk, CK_44XX),
+ CLK(NULL, "usb_host_hs_utmi_p1_clk", &usb_host_hs_utmi_p1_clk, CK_44XX),
+ CLK(NULL, "utmi_p2_gfclk", &utmi_p2_gfclk, CK_44XX),
+ CLK(NULL, "usb_host_hs_utmi_p2_clk", &usb_host_hs_utmi_p2_clk, CK_44XX),
+ CLK(NULL, "usb_host_hs_utmi_p3_clk", &usb_host_hs_utmi_p3_clk, CK_44XX),
+ CLK(NULL, "usb_host_hs_hsic480m_p1_clk", &usb_host_hs_hsic480m_p1_clk, CK_44XX),
+ CLK(NULL, "usb_host_hs_hsic60m_p1_clk", &usb_host_hs_hsic60m_p1_clk, CK_44XX),
+ CLK(NULL, "usb_host_hs_hsic60m_p2_clk", &usb_host_hs_hsic60m_p2_clk, CK_44XX),
+ CLK(NULL, "usb_host_hs_hsic480m_p2_clk", &usb_host_hs_hsic480m_p2_clk, CK_44XX),
+ CLK(NULL, "usb_host_hs_func48mclk", &usb_host_hs_func48mclk, CK_44XX),
+ CLK(NULL, "usb_host_hs_fck", &usb_host_hs_fck, CK_44XX),
+ CLK("usbhs_omap", "hs_fck", &usb_host_hs_fck, CK_44XX),
+ CLK(NULL, "otg_60m_gfclk", &otg_60m_gfclk, CK_44XX),
+ CLK(NULL, "usb_otg_hs_xclk", &usb_otg_hs_xclk, CK_44XX),
+ CLK(NULL, "usb_otg_hs_ick", &usb_otg_hs_ick, CK_44XX),
+ CLK("musb-omap2430", "ick", &usb_otg_hs_ick, CK_44XX),
+ CLK(NULL, "usb_phy_cm_clk32k", &usb_phy_cm_clk32k, CK_44XX),
+ CLK(NULL, "usb_tll_hs_usb_ch2_clk", &usb_tll_hs_usb_ch2_clk, CK_44XX),
+ CLK(NULL, "usb_tll_hs_usb_ch0_clk", &usb_tll_hs_usb_ch0_clk, CK_44XX),
+ CLK(NULL, "usb_tll_hs_usb_ch1_clk", &usb_tll_hs_usb_ch1_clk, CK_44XX),
+ CLK(NULL, "usb_tll_hs_ick", &usb_tll_hs_ick, CK_44XX),
+ CLK("usbhs_omap", "usbtll_ick", &usb_tll_hs_ick, CK_44XX),
+ CLK("usbhs_tll", "usbtll_ick", &usb_tll_hs_ick, CK_44XX),
+ CLK(NULL, "usim_ck", &usim_ck, CK_44XX),
+ CLK(NULL, "usim_fclk", &usim_fclk, CK_44XX),
+ CLK(NULL, "usim_fck", &usim_fck, CK_44XX),
+ CLK(NULL, "wd_timer2_fck", &wd_timer2_fck, CK_44XX),
+ CLK(NULL, "wd_timer3_fck", &wd_timer3_fck, CK_44XX),
+ CLK(NULL, "pmd_stm_clock_mux_ck", &pmd_stm_clock_mux_ck, CK_44XX),
+ CLK(NULL, "pmd_trace_clk_mux_ck", &pmd_trace_clk_mux_ck, CK_44XX),
+ CLK(NULL, "stm_clk_div_ck", &stm_clk_div_ck, CK_44XX),
+ CLK(NULL, "trace_clk_div_ck", &trace_clk_div_ck, CK_44XX),
+ CLK(NULL, "auxclk0_src_ck", &auxclk0_src_ck, CK_44XX),
+ CLK(NULL, "auxclk0_ck", &auxclk0_ck, CK_44XX),
+ CLK(NULL, "auxclkreq0_ck", &auxclkreq0_ck, CK_44XX),
+ CLK(NULL, "auxclk1_src_ck", &auxclk1_src_ck, CK_44XX),
+ CLK(NULL, "auxclk1_ck", &auxclk1_ck, CK_44XX),
+ CLK(NULL, "auxclkreq1_ck", &auxclkreq1_ck, CK_44XX),
+ CLK(NULL, "auxclk2_src_ck", &auxclk2_src_ck, CK_44XX),
+ CLK(NULL, "auxclk2_ck", &auxclk2_ck, CK_44XX),
+ CLK(NULL, "auxclkreq2_ck", &auxclkreq2_ck, CK_44XX),
+ CLK(NULL, "auxclk3_src_ck", &auxclk3_src_ck, CK_44XX),
+ CLK(NULL, "auxclk3_ck", &auxclk3_ck, CK_44XX),
+ CLK(NULL, "auxclkreq3_ck", &auxclkreq3_ck, CK_44XX),
+ CLK(NULL, "auxclk4_src_ck", &auxclk4_src_ck, CK_44XX),
+ CLK(NULL, "auxclk4_ck", &auxclk4_ck, CK_44XX),
+ CLK(NULL, "auxclkreq4_ck", &auxclkreq4_ck, CK_44XX),
+ CLK(NULL, "auxclk5_src_ck", &auxclk5_src_ck, CK_44XX),
+ CLK(NULL, "auxclk5_ck", &auxclk5_ck, CK_44XX),
+ CLK(NULL, "auxclkreq5_ck", &auxclkreq5_ck, CK_44XX),
+ CLK("omap-gpmc", "fck", &dummy_ck, CK_44XX),
+ CLK("omap_i2c.1", "ick", &dummy_ck, CK_44XX),
+ CLK("omap_i2c.2", "ick", &dummy_ck, CK_44XX),
+ CLK("omap_i2c.3", "ick", &dummy_ck, CK_44XX),
+ CLK("omap_i2c.4", "ick", &dummy_ck, CK_44XX),
+ CLK(NULL, "mailboxes_ick", &dummy_ck, CK_44XX),
+ CLK("omap_hsmmc.0", "ick", &dummy_ck, CK_44XX),
+ CLK("omap_hsmmc.1", "ick", &dummy_ck, CK_44XX),
+ CLK("omap_hsmmc.2", "ick", &dummy_ck, CK_44XX),
+ CLK("omap_hsmmc.3", "ick", &dummy_ck, CK_44XX),
+ CLK("omap_hsmmc.4", "ick", &dummy_ck, CK_44XX),
+ CLK("omap-mcbsp.1", "ick", &dummy_ck, CK_44XX),
+ CLK("omap-mcbsp.2", "ick", &dummy_ck, CK_44XX),
+ CLK("omap-mcbsp.3", "ick", &dummy_ck, CK_44XX),
+ CLK("omap-mcbsp.4", "ick", &dummy_ck, CK_44XX),
+ CLK("omap2_mcspi.1", "ick", &dummy_ck, CK_44XX),
+ CLK("omap2_mcspi.2", "ick", &dummy_ck, CK_44XX),
+ CLK("omap2_mcspi.3", "ick", &dummy_ck, CK_44XX),
+ CLK("omap2_mcspi.4", "ick", &dummy_ck, CK_44XX),
+ CLK(NULL, "uart1_ick", &dummy_ck, CK_44XX),
+ CLK(NULL, "uart2_ick", &dummy_ck, CK_44XX),
+ CLK(NULL, "uart3_ick", &dummy_ck, CK_44XX),
+ CLK(NULL, "uart4_ick", &dummy_ck, CK_44XX),
+ CLK("usbhs_omap", "usbhost_ick", &dummy_ck, CK_44XX),
+ CLK("usbhs_omap", "usbtll_fck", &dummy_ck, CK_44XX),
+ CLK("usbhs_tll", "usbtll_fck", &dummy_ck, CK_44XX),
+ CLK("omap_wdt", "ick", &dummy_ck, CK_44XX),
+ CLK(NULL, "timer_32k_ck", &sys_32k_ck, CK_44XX),
/* TODO: Remove "omap_timer.X" aliases once DT migration is complete */
- CLK("omap_timer.1", "timer_sys_ck", &sys_clkin_ck, CK_443X),
- CLK("omap_timer.2", "timer_sys_ck", &sys_clkin_ck, CK_443X),
- CLK("omap_timer.3", "timer_sys_ck", &sys_clkin_ck, CK_443X),
- CLK("omap_timer.4", "timer_sys_ck", &sys_clkin_ck, CK_443X),
- CLK("omap_timer.9", "timer_sys_ck", &sys_clkin_ck, CK_443X),
- CLK("omap_timer.10", "timer_sys_ck", &sys_clkin_ck, CK_443X),
- CLK("omap_timer.11", "timer_sys_ck", &sys_clkin_ck, CK_443X),
- CLK("omap_timer.5", "timer_sys_ck", &syc_clk_div_ck, CK_443X),
- CLK("omap_timer.6", "timer_sys_ck", &syc_clk_div_ck, CK_443X),
- CLK("omap_timer.7", "timer_sys_ck", &syc_clk_div_ck, CK_443X),
- CLK("omap_timer.8", "timer_sys_ck", &syc_clk_div_ck, CK_443X),
- CLK("4a318000.timer", "timer_sys_ck", &sys_clkin_ck, CK_443X),
- CLK("48032000.timer", "timer_sys_ck", &sys_clkin_ck, CK_443X),
- CLK("48034000.timer", "timer_sys_ck", &sys_clkin_ck, CK_443X),
- CLK("48036000.timer", "timer_sys_ck", &sys_clkin_ck, CK_443X),
- CLK("4803e000.timer", "timer_sys_ck", &sys_clkin_ck, CK_443X),
- CLK("48086000.timer", "timer_sys_ck", &sys_clkin_ck, CK_443X),
- CLK("48088000.timer", "timer_sys_ck", &sys_clkin_ck, CK_443X),
- CLK("40138000.timer", "timer_sys_ck", &syc_clk_div_ck, CK_443X),
- CLK("4013a000.timer", "timer_sys_ck", &syc_clk_div_ck, CK_443X),
- CLK("4013c000.timer", "timer_sys_ck", &syc_clk_div_ck, CK_443X),
- CLK("4013e000.timer", "timer_sys_ck", &syc_clk_div_ck, CK_443X),
- CLK(NULL, "cpufreq_ck", &dpll_mpu_ck, CK_443X),
+ CLK("omap_timer.1", "timer_sys_ck", &sys_clkin_ck, CK_44XX),
+ CLK("omap_timer.2", "timer_sys_ck", &sys_clkin_ck, CK_44XX),
+ CLK("omap_timer.3", "timer_sys_ck", &sys_clkin_ck, CK_44XX),
+ CLK("omap_timer.4", "timer_sys_ck", &sys_clkin_ck, CK_44XX),
+ CLK("omap_timer.9", "timer_sys_ck", &sys_clkin_ck, CK_44XX),
+ CLK("omap_timer.10", "timer_sys_ck", &sys_clkin_ck, CK_44XX),
+ CLK("omap_timer.11", "timer_sys_ck", &sys_clkin_ck, CK_44XX),
+ CLK("omap_timer.5", "timer_sys_ck", &syc_clk_div_ck, CK_44XX),
+ CLK("omap_timer.6", "timer_sys_ck", &syc_clk_div_ck, CK_44XX),
+ CLK("omap_timer.7", "timer_sys_ck", &syc_clk_div_ck, CK_44XX),
+ CLK("omap_timer.8", "timer_sys_ck", &syc_clk_div_ck, CK_44XX),
+ CLK("4a318000.timer", "timer_sys_ck", &sys_clkin_ck, CK_44XX),
+ CLK("48032000.timer", "timer_sys_ck", &sys_clkin_ck, CK_44XX),
+ CLK("48034000.timer", "timer_sys_ck", &sys_clkin_ck, CK_44XX),
+ CLK("48036000.timer", "timer_sys_ck", &sys_clkin_ck, CK_44XX),
+ CLK("4803e000.timer", "timer_sys_ck", &sys_clkin_ck, CK_44XX),
+ CLK("48086000.timer", "timer_sys_ck", &sys_clkin_ck, CK_44XX),
+ CLK("48088000.timer", "timer_sys_ck", &sys_clkin_ck, CK_44XX),
+ CLK("40138000.timer", "timer_sys_ck", &syc_clk_div_ck, CK_44XX),
+ CLK("4013a000.timer", "timer_sys_ck", &syc_clk_div_ck, CK_44XX),
+ CLK("4013c000.timer", "timer_sys_ck", &syc_clk_div_ck, CK_44XX),
+ CLK("4013e000.timer", "timer_sys_ck", &syc_clk_div_ck, CK_44XX),
+ CLK(NULL, "cpufreq_ck", &dpll_mpu_ck, CK_44XX),
};
static const char *enable_init_clks[] = {
@@ -2000,7 +2000,7 @@ int __init omap4xxx_clk_init(void)
cpu_clkflg = CK_443X;
} else if (cpu_is_omap446x() || cpu_is_omap447x()) {
cpu_mask = RATE_IN_4460 | RATE_IN_4430;
- cpu_clkflg = CK_446X | CK_443X;
+ cpu_clkflg = CK_446X;
if (cpu_is_omap447x())
pr_warn("WARNING: OMAP4470 clock data incomplete!\n");
diff --git a/arch/arm/mach-omap2/clock.h b/arch/arm/mach-omap2/clock.h
index b402048..7678272 100644
--- a/arch/arm/mach-omap2/clock.h
+++ b/arch/arm/mach-omap2/clock.h
@@ -44,12 +44,12 @@ struct omap_clk {
#define CK_3430ES2PLUS (1 << 3) /* 34xxES2, ES3, non-Sitara 35xx only */
#define CK_AM35XX (1 << 4) /* Sitara AM35xx */
#define CK_36XX (1 << 5) /* 36xx/37xx-specific clocks */
-#define CK_443X (1 << 6)
+#define CK_443X (1 << 6) /* Specific to OMAP443X */
#define CK_TI816X (1 << 7)
-#define CK_446X (1 << 8)
+#define CK_446X (1 << 8) /* Specific to OMAP446X */
#define CK_AM33XX (1 << 9) /* AM33xx specific clocks */
-
+#define CK_44XX (CK_443X | CK_446X)
#define CK_34XX (CK_3430ES1 | CK_3430ES2PLUS)
#define CK_3XXX (CK_34XX | CK_AM35XX | CK_36XX)
--
1.7.5.4
--
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