Re: [PATCH 2/6] i2c: omap: also complete() when stat becomes zero

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Hi,

On Thu, Jan 24, 2013 at 11:13:39AM +0200, Felipe Balbi wrote:
> On Thu, Jan 24, 2013 at 11:05:11AM +0200, Aaro Koskinen wrote:
> > On Wed, Jan 23, 2013 at 12:23:04PM +0200, Felipe Balbi wrote:
> > > In case we loop on IRQ handler until stat is
> > > finally zero, we would end up in a situation
> > > where all I2C transfers would misteriously
> > > timeout because we were not calling complete()
> > > in that situation.
> > 
> > This is wrong, you may still have bytes to transfer,
> > but a new interrupt has not arrived yet.
> > 
> > This patch also breaks bisection; if you just apply patches 1-2 of
> > this series the I2C does not work at all.
> 
> probably another n900-thing. What I had seen is that we could endup in a
> situation where we wouldn't "break" out of the look, and rather would
> fall in the "goto out" when STAT register is zero. In that case, even if
> we had transferred all bytes, we wouldn't call complete() and, thus, our
> commands would timeout.
> 
> Care to send console logs of the error you have seen ? I kinda doubt we
> can fall into the situation you described above where IRQ hasn't been
> updated to STAT register.

BTW, check what happens if you just revert that commit.

-- 
balbi

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