Some of clocks can have a limit on minimum divider value that can be
programmed. Modify basic clock divider to take care of this aspect.
Signed-off-by: Afzal Mohammed <afzal@xxxxxx>
---
drivers/clk/clk-divider.c | 12 +++++++++---
1 file changed, 9 insertions(+), 3 deletions(-)
diff --git a/drivers/clk/clk-divider.c b/drivers/clk/clk-divider.c
index 0b34992..2de9ff5 100644
--- a/drivers/clk/clk-divider.c
+++ b/drivers/clk/clk-divider.c
@@ -32,6 +32,11 @@
#define div_mask(d) ((1 << (d->width)) - 1)
#define is_power_of_two(i) !(i & ~i)
+static unsigned int _get_mindiv(struct clk_divider *divider)
+{
+ return divider->min_div;
+}
+
static unsigned int _get_table_maxdiv(const struct clk_div_table *table)
{
unsigned int maxdiv = 0;
@@ -148,17 +153,18 @@ static int clk_divider_bestdiv(struct clk_hw *hw, unsigned long rate,
{
struct clk_divider *divider = to_clk_divider(hw);
int i, bestdiv = 0;
- unsigned long parent_rate, best = 0, now, maxdiv;
+ unsigned long parent_rate, best = 0, now, maxdiv, mindiv;
if (!rate)
rate = 1;
maxdiv = _get_maxdiv(divider);
+ mindiv = _get_mindiv(divider);
if (!(__clk_get_flags(hw->clk) & CLK_SET_RATE_PARENT)) {
parent_rate = *best_parent_rate;
bestdiv = DIV_ROUND_UP(parent_rate, rate);
- bestdiv = bestdiv == 0 ? 1 : bestdiv;
+ bestdiv = bestdiv == 0 ? mindiv : bestdiv;
bestdiv = bestdiv > maxdiv ? maxdiv : bestdiv;
return bestdiv;
}
@@ -169,7 +175,7 @@ static int clk_divider_bestdiv(struct clk_hw *hw, unsigned long rate,
*/
maxdiv = min(ULONG_MAX / rate, maxdiv);
- for (i = 1; i <= maxdiv; i++) {
+ for (i = mindiv; i <= maxdiv; i++) {
if (!_is_valid_div(divider, i))
continue;
parent_rate = __clk_round_rate(__clk_get_parent(hw->clk),
--
1.7.12
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